projects
/
oweals
/
u-boot.git
/ blobdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
|
commitdiff
|
tree
raw
|
inline
| side by side
verdin-imx8mm: Change board phy skew values for our ksz9031
[oweals/u-boot.git]
/
doc
/
README.mpc85xx
diff --git
a/doc/README.mpc85xx
b/doc/README.mpc85xx
index f9b023f28413b6b0d3c0f6183220cda7b066e866..8464e7f4d8a654079905c2453af70ca6f7df19b5 100644
(file)
--- a/
doc/README.mpc85xx
+++ b/
doc/README.mpc85xx
@@
-28,11
+28,11
@@
Major Config Switches during various boot Modes
NOR boot
!defined(CONFIG_SYS_RAMBOOT) && !defined(CONFIG_SPL)
NOR boot Secure
NOR boot
!defined(CONFIG_SYS_RAMBOOT) && !defined(CONFIG_SPL)
NOR boot Secure
- !defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_
SECURE_BOOT
)
+ !defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_
NXP_ESBC
)
RAMBOOT(SD, SPI & NAND boot)
defined(CONFIG_SYS_RAMBOOT)
RAMBOOT Secure (SD, SPI & NAND)
RAMBOOT(SD, SPI & NAND boot)
defined(CONFIG_SYS_RAMBOOT)
RAMBOOT Secure (SD, SPI & NAND)
- defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_
SECURE_BOOT
)
+ defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_
NXP_ESBC
)
NAND SPL BOOT
defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_NAND_SPL)
NAND SPL BOOT
defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_NAND_SPL)
@@
-93,7
+93,7
@@
B) !defined(CONFIG_SYS_RAMBOOT) i.e. NOR boot
1) TLB entry to overcome e500 v1/v2 debug restriction
Location : Label "_start_e500"
TLB Entry : CONFIG_SYS_PPC_E500_DEBUG_TLB
1) TLB entry to overcome e500 v1/v2 debug restriction
Location : Label "_start_e500"
TLB Entry : CONFIG_SYS_PPC_E500_DEBUG_TLB
-#if defined(CONFIG_
SECURE_BOOT
)
+#if defined(CONFIG_
NXP_ESBC
)
EPN -->RPN : CONFIG_SYS_MONITOR_BASE --> CONFIG_SYS_PBI_FLASH_WINDOW
Properties : 1M, AS1, I, G, IPROT
#else
EPN -->RPN : CONFIG_SYS_MONITOR_BASE --> CONFIG_SYS_PBI_FLASH_WINDOW
Properties : 1M, AS1, I, G, IPROT
#else
@@
-104,7
+104,7
@@
B) !defined(CONFIG_SYS_RAMBOOT) i.e. NOR boot
2) TLB entry for working in AS1
Location : Label "create_init_ram_area"
TLB Entry : 15
2) TLB entry for working in AS1
Location : Label "create_init_ram_area"
TLB Entry : 15
-#if defined(CONFIG_
SECURE_BOOT
)
+#if defined(CONFIG_
NXP_ESBC
)
EPN -->RPN : CONFIG_SYS_MONITOR_BASE --> CONFIG_SYS_PBI_FLASH_WINDOW
Properties : 1M, AS1, I, G, IPROT
#else
EPN -->RPN : CONFIG_SYS_MONITOR_BASE --> CONFIG_SYS_PBI_FLASH_WINDOW
Properties : 1M, AS1, I, G, IPROT
#else
@@
-156,7
+156,7
@@
B) !defined(CONFIG_SYS_RAMBOOT) i.e. NOR boot
Disable : 15, 14
11) Create DDR's TLB entriy
Disable : 15, 14
11) Create DDR's TLB entriy
- Location : Board_init_f ->
init_func_ram -> initdram
+ Location : Board_init_f ->
dram_init
TLB entry : Search free TLB entry
12) Update Flash's TLB entry
TLB entry : Search free TLB entry
12) Update Flash's TLB entry