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MIPS: add compile time definition of L2 cache size
[oweals/u-boot.git]
/
doc
/
README.generic_usb_ohci
diff --git
a/doc/README.generic_usb_ohci
b/doc/README.generic_usb_ohci
index ba7cea83ca8eb2bf5825344edbcf4cf337c7b7b9..65b0896c7fd29603a69e3e1f6c1b82997d205491 100644
(file)
--- a/
doc/README.generic_usb_ohci
+++ b/
doc/README.generic_usb_ohci
@@
-13,7
+13,7
@@
Configuration options
CONFIG_SYS_USB_OHCI_BOARD_INIT: call the board dependant hooks:
CONFIG_SYS_USB_OHCI_BOARD_INIT: call the board dependant hooks:
- - extern int
usb_board
_init(void);
+ - extern int
board_usb
_init(void);
- extern int usb_board_stop(void);
- extern int usb_cpu_init_fail(void);
- extern int usb_board_stop(void);
- extern int usb_cpu_init_fail(void);
@@
-36,8
+36,8
@@
Endianness issues
------------------
The USB bus operates in little endian, but unfortunately there are
------------------
The USB bus operates in little endian, but unfortunately there are
-OHCI controllers that operate in big endian such as ppc4xx
and
-
mpc5xxx. For these the
config option
+OHCI controllers that operate in big endian such as ppc4xx
. For these the
+config option
CONFIG_SYS_OHCI_BE_CONTROLLER
CONFIG_SYS_OHCI_BE_CONTROLLER