-
-#if defined(CONFIG_NAND_SPL)
-#if defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
- /*
- * Enable internal SRAM (only on 440EPx/GRx, 440EP/GR have no OCM)
- */
- lis r2,0x7fff
- ori r2,r2,0xffff
- mfdcr r1,isram0_dpc
- and r1,r1,r2 /* Disable parity check */
- mtdcr isram0_dpc,r1
- mfdcr r1,isram0_pmeg
- and r1,r1,r2 /* Disable pwr mgmt */
- mtdcr isram0_pmeg,r1
-#endif
-#if defined(CONFIG_440EP)
- /*
- * On 440EP with no internal SRAM, we setup SDRAM very early
- * and copy the NAND_SPL to SDRAM and jump to it
- */
- /* Clear Dcache to use as RAM */
- addis r3,r0,CFG_INIT_RAM_ADDR@h
- ori r3,r3,CFG_INIT_RAM_ADDR@l
- addis r4,r0,CFG_INIT_RAM_END@h
- ori r4,r4,CFG_INIT_RAM_END@l
- rlwinm. r5,r4,0,27,31
- rlwinm r5,r4,27,5,31
- beq ..d_ran3
- addi r5,r5,0x0001
-..d_ran3:
- mtctr r5
-..d_ag3:
- dcbz r0,r3
- addi r3,r3,32
- bdnz ..d_ag3
- /*----------------------------------------------------------------*/
- /* Setup the stack in internal SRAM */
- /*----------------------------------------------------------------*/
- lis r1,CFG_INIT_RAM_ADDR@h
- ori r1,r1,CFG_INIT_SP_OFFSET@l
- li r0,0
- stwu r0,-4(r1)
- stwu r0,-4(r1) /* Terminate call chain */
-
- stwu r1,-8(r1) /* Save back chain and move SP */
- lis r0,RESET_VECTOR@h /* Address of reset vector */
- ori r0,r0, RESET_VECTOR@l
- stwu r1,-8(r1) /* Save back chain and move SP */
- stw r0,+12(r1) /* Save return addr (underflow vect) */
- sync
- bl early_sdram_init
- sync
-#endif /* CONFIG_440EP */
-
- /*
- * Copy SPL from cache into internal SRAM
- */
- li r4,(CFG_NAND_BOOT_SPL_SIZE >> 2) - 1
- mtctr r4
- lis r2,CFG_NAND_BOOT_SPL_SRC@h
- ori r2,r2,CFG_NAND_BOOT_SPL_SRC@l
- lis r3,CFG_NAND_BOOT_SPL_DST@h
- ori r3,r3,CFG_NAND_BOOT_SPL_DST@l
-spl_loop:
- lwzu r4,4(r2)
- stwu r4,4(r3)
- bdnz spl_loop
-
- /*
- * Jump to code in RAM
- */
- bl 00f
-00: mflr r10
- lis r3,(CFG_NAND_BOOT_SPL_SRC - CFG_NAND_BOOT_SPL_DST)@h
- ori r3,r3,(CFG_NAND_BOOT_SPL_SRC - CFG_NAND_BOOT_SPL_DST)@l
- sub r10,r10,r3
- addi r10,r10,28
- mtlr r10
- blr
-
-start_ram:
- sync
- isync
-#endif /* CONFIG_NAND_SPL */
-