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ppc4xx: Fix missing freqOPB for 405EP
[oweals/u-boot.git]
/
cpu
/
ppc4xx
/
ecc.c
diff --git
a/cpu/ppc4xx/ecc.c
b/cpu/ppc4xx/ecc.c
index 95b941dabbb9c6a0d818071c03048ec2b7f0e9db..3f989e7f59b16083154adc5503636a29ef3eee8a 100644
(file)
--- a/
cpu/ppc4xx/ecc.c
+++ b/
cpu/ppc4xx/ecc.c
@@
-45,7
+45,8
@@
#include "ecc.h"
#include "ecc.h"
-#if !defined(CONFIG_440EPX) && !defined(CONFIG_440GRX)
+#if defined(CONFIG_SDRAM_PPC4xx_IBM_DDR) || \
+ defined(CONFIG_SDRAM_PPC4xx_IBM_DDR2)
#if defined(CONFIG_DDR_ECC) || defined(CONFIG_SDRAM_ECC)
/*
* void ecc_init()
#if defined(CONFIG_DDR_ECC) || defined(CONFIG_SDRAM_ECC)
/*
* void ecc_init()
@@
-67,7
+68,7
@@
*
* Output(s):
* start - A pointer to the start of memory covered by ECC with
*
* Output(s):
* start - A pointer to the start of memory covered by ECC with
- * C
FG
_ECC_PATTERN written to all locations and ECC data
+ * C
ONFIG_SYS
_ECC_PATTERN written to all locations and ECC data
* primed.
*
* Returns:
* primed.
*
* Returns:
@@
-75,8
+76,8
@@
*/
void ecc_init(unsigned long * const start, unsigned long size)
{
*/
void ecc_init(unsigned long * const start, unsigned long size)
{
- const unsigned long pattern = C
FG
_ECC_PATTERN;
- unsigned * const end = (unsigned long * const)((long)start + size);
+ const unsigned long pattern = C
ONFIG_SYS
_ECC_PATTERN;
+ unsigned
long
* const end = (unsigned long * const)((long)start + size);
unsigned long * current = start;
unsigned long mcopt1;
long increment;
unsigned long * current = start;
unsigned long mcopt1;
long increment;
@@
-84,12
+85,12
@@
void ecc_init(unsigned long * const start, unsigned long size)
if (start >= end)
return;
if (start >= end)
return;
- mfsdram(SDRAM_
MCOPT1
, mcopt1);
+ mfsdram(SDRAM_
ECC_CFG
, mcopt1);
/* Enable ECC generation without checking or reporting */
/* Enable ECC generation without checking or reporting */
- mtsdram(SDRAM_
MCOPT1, ((mcopt1 & ~SDRAM_MCOPT1
_MCHK_MASK) |
-
SDRAM_MCOPT1
_MCHK_GEN));
+ mtsdram(SDRAM_
ECC_CFG, ((mcopt1 & ~SDRAM_ECC_CFG
_MCHK_MASK) |
+
SDRAM_ECC_CFG
_MCHK_GEN));
increment = sizeof(u32);
increment = sizeof(u32);
@@
-99,7
+100,7
@@
void ecc_init(unsigned long * const start, unsigned long size)
* can skip words when writing.
*/
* can skip words when writing.
*/
- if ((mcopt1 & SDRAM_
MCOPT1_DMWD_MASK) != SDRAM_MCOPT1
_DMWD_32)
+ if ((mcopt1 & SDRAM_
ECC_CFG_DMWD_MASK) != SDRAM_ECC_CFG
_DMWD_32)
increment = sizeof(u64);
#endif /* defined(CONFIG_440) */
increment = sizeof(u64);
#endif /* defined(CONFIG_440) */
@@
-114,8
+115,8
@@
void ecc_init(unsigned long * const start, unsigned long size)
/* Enable ECC generation with checking and no reporting */
/* Enable ECC generation with checking and no reporting */
- mtsdram(SDRAM_
MCOPT1, ((mcopt1 & ~SDRAM_MCOPT1
_MCHK_MASK) |
-
SDRAM_MCOPT1
_MCHK_CHK));
+ mtsdram(SDRAM_
ECC_CFG, ((mcopt1 & ~SDRAM_ECC_CFG
_MCHK_MASK) |
+
SDRAM_ECC_CFG
_MCHK_CHK));
}
#endif /* defined(CONFIG_DDR_ECC) || defined(CONFIG_SDRAM_ECC) */
}
#endif /* defined(CONFIG_DDR_ECC) || defined(CONFIG_SDRAM_ECC) */
-#endif /*
!defined(CONFIG_440EPX) && !defined(CONFIG_440GRX)
*/
+#endif /*
defined(CONFIG_SDRAM_PPC4xx_IBM_DDR)...
*/