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rename CFG_ macros to CONFIG_SYS
[oweals/u-boot.git]
/
cpu
/
ppc4xx
/
4xx_uart.c
diff --git
a/cpu/ppc4xx/4xx_uart.c
b/cpu/ppc4xx/4xx_uart.c
index ac2b12b8773986e9be931b40ccf6f64a0a91c191..c106ac223cbaf9c68a8565505689f93d172ab135 100644
(file)
--- a/
cpu/ppc4xx/4xx_uart.c
+++ b/
cpu/ppc4xx/4xx_uart.c
@@
-46,7
+46,7
@@
#include <asm/processor.h>
#include <asm/io.h>
#include <watchdog.h>
#include <asm/processor.h>
#include <asm/io.h>
#include <watchdog.h>
-#include
"vecnum.h"
+#include
<ppc4xx.h>
#ifdef CONFIG_SERIAL_MULTI
#include <serial.h>
#ifdef CONFIG_SERIAL_MULTI
#include <serial.h>
@@
-64,16
+64,22
@@
DECLARE_GLOBAL_DATA_PTR;
#if defined(CONFIG_440)
#if defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
#if defined(CONFIG_440)
#if defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
- defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
-#define UART0_BASE CFG_PERIPHERAL_BASE + 0x00000300
-#define UART1_BASE CFG_PERIPHERAL_BASE + 0x00000400
+ defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
+ defined(CONFIG_460EX) || defined(CONFIG_460GT)
+#define UART0_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x00000300)
+#define UART1_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x00000400)
#else
#else
-#define UART0_BASE
CFG_PERIPHERAL_BASE + 0x00000200
-#define UART1_BASE
CFG_PERIPHERAL_BASE + 0x00000300
+#define UART0_BASE
(CONFIG_SYS_PERIPHERAL_BASE + 0x00000200)
+#define UART1_BASE
(CONFIG_SYS_PERIPHERAL_BASE + 0x00000300)
#endif
#if defined(CONFIG_440SP) || defined(CONFIG_440SPE)
#endif
#if defined(CONFIG_440SP) || defined(CONFIG_440SPE)
-#define UART2_BASE CFG_PERIPHERAL_BASE + 0x00000600
+#define UART2_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x00000600)
+#endif
+
+#if defined(CONFIG_460EX) || defined(CONFIG_460GT)
+#define UART2_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x00000500)
+#define UART3_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x00000600)
#endif
#if defined(CONFIG_440GP)
#endif
#if defined(CONFIG_440GP)
@@
-92,13
+98,15
@@
DECLARE_GLOBAL_DATA_PTR;
#define UDIV_SUBTRACT 0
#define UART0_SDR sdr_uart0
#define UART1_SDR sdr_uart1
#define UDIV_SUBTRACT 0
#define UART0_SDR sdr_uart0
#define UART1_SDR sdr_uart1
-#if defined(CONFIG_440EP) || defined(CONFIG_440EPx) || \
- defined(CONFIG_440GR) || defined(CONFIG_440GRx) || \
- defined(CONFIG_440SP) || defined(CONFIG_440SPe)
+#if defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \
+ defined(CONFIG_440GR) || defined(CONFIG_440GRX) || \
+ defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \
+ defined(CONFIG_460EX) || defined(CONFIG_460GT)
#define UART2_SDR sdr_uart2
#endif
#define UART2_SDR sdr_uart2
#endif
-#if defined(CONFIG_440EP) || defined(CONFIG_440EPx) || \
- defined(CONFIG_440GR) || defined(CONFIG_440GRx)
+#if defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \
+ defined(CONFIG_440GR) || defined(CONFIG_440GRX) || \
+ defined(CONFIG_460EX) || defined(CONFIG_460GT)
#define UART3_SDR sdr_uart3
#endif
#define MFREG(a, d) mfsdr(a, d)
#define UART3_SDR sdr_uart3
#endif
#define MFREG(a, d) mfsdr(a, d)
@@
-139,7
+147,7
@@
DECLARE_GLOBAL_DATA_PTR;
#define ACTING_UART1_BASE UART1_BASE
#endif
#define ACTING_UART1_BASE UART1_BASE
#endif
-#if defined(CONFIG_405EP) && defined(C
FG
_EXT_SERIAL_CLOCK)
+#if defined(CONFIG_405EP) && defined(C
ONFIG_SYS
_EXT_SERIAL_CLOCK)
#error "External serial clock not supported on AMCC PPC405EP!"
#endif
#error "External serial clock not supported on AMCC PPC405EP!"
#endif
@@
-191,8
+199,8
@@
static void serial_init_common(u32 base, u32 udiv, u16 bdiv)
/* Correct UART frequency in bd-info struct now that
* the UART divisor is available
*/
/* Correct UART frequency in bd-info struct now that
* the UART divisor is available
*/
-#ifdef C
FG
_EXT_SERIAL_CLOCK
- gd->uart_clk = C
FG
_EXT_SERIAL_CLOCK;
+#ifdef C
ONFIG_SYS
_EXT_SERIAL_CLOCK
+ gd->uart_clk = C
ONFIG_SYS
_EXT_SERIAL_CLOCK;
#else
gd->uart_clk = sys_info.freqUART / udiv;
#endif
#else
gd->uart_clk = sys_info.freqUART / udiv;
#endif
@@
-210,7
+218,7
@@
static void serial_init_common(u32 base, u32 udiv, u16 bdiv)
}
#if (defined(CONFIG_440) || defined(CONFIG_405EX)) && \
}
#if (defined(CONFIG_440) || defined(CONFIG_405EX)) && \
- !defined(C
FG
_EXT_SERIAL_CLOCK)
+ !defined(C
ONFIG_SYS
_EXT_SERIAL_CLOCK)
static void serial_divs (int baudrate, unsigned long *pudiv,
unsigned short *pbdiv)
{
static void serial_divs (int baudrate, unsigned long *pudiv,
unsigned short *pbdiv)
{
@@
-307,7
+315,7
@@
static void serial_divs (int baudrate, unsigned long *pudiv,
mtcpr(cprperd0, reg);
*pbdiv = div / udiv;
}
mtcpr(cprperd0, reg);
*pbdiv = div / udiv;
}
-#endif /* defined(CONFIG_440) && !defined(C
FG
_EXT_SERIAL_CLK) */
+#endif /* defined(CONFIG_440) && !defined(C
ONFIG_SYS
_EXT_SERIAL_CLK) */
/*
* Minimal serial functions needed to use one of the SMC ports
/*
* Minimal serial functions needed to use one of the SMC ports
@@
-320,18
+328,18
@@
int serial_init_dev(unsigned long base)
unsigned long reg;
unsigned long udiv;
unsigned short bdiv;
unsigned long reg;
unsigned long udiv;
unsigned short bdiv;
-#ifdef C
FG
_EXT_SERIAL_CLOCK
+#ifdef C
ONFIG_SYS
_EXT_SERIAL_CLOCK
unsigned long tmp;
#endif
MFREG(UART0_SDR, reg);
reg &= ~CR0_MASK;
unsigned long tmp;
#endif
MFREG(UART0_SDR, reg);
reg &= ~CR0_MASK;
-#ifdef C
FG
_EXT_SERIAL_CLOCK
+#ifdef C
ONFIG_SYS
_EXT_SERIAL_CLOCK
reg |= CR0_EXTCLK_ENA;
udiv = 1;
tmp = gd->baudrate * 16;
reg |= CR0_EXTCLK_ENA;
udiv = 1;
tmp = gd->baudrate * 16;
- bdiv = (C
FG
_EXT_SERIAL_CLOCK + tmp / 2) / tmp;
+ bdiv = (C
ONFIG_SYS
_EXT_SERIAL_CLOCK + tmp / 2) / tmp;
#else
/* For 440, the cpu clock is on divider chain A, UART on divider
* chain B ... so cpu clock is irrelevant. Get the "optimized"
#else
/* For 440, the cpu clock is on divider chain A, UART on divider
* chain B ... so cpu clock is irrelevant. Get the "optimized"
@@
-376,11
+384,11
@@
int serial_init_dev (unsigned long base)
clk = tmp = 0;
mfsdr(UART0_SDR, reg);
reg &= ~CR0_MASK;
clk = tmp = 0;
mfsdr(UART0_SDR, reg);
reg &= ~CR0_MASK;
-#ifdef C
FG
_EXT_SERIAL_CLOCK
+#ifdef C
ONFIG_SYS
_EXT_SERIAL_CLOCK
reg |= CR0_EXTCLK_ENA;
udiv = 1;
tmp = gd->baudrate * 16;
reg |= CR0_EXTCLK_ENA;
udiv = 1;
tmp = gd->baudrate * 16;
- bdiv = (C
FG
_EXT_SERIAL_CLOCK + tmp / 2) / tmp;
+ bdiv = (C
ONFIG_SYS
_EXT_SERIAL_CLOCK + tmp / 2) / tmp;
#else
serial_divs(gd->baudrate, &udiv, &bdiv);
#endif
#else
serial_divs(gd->baudrate, &udiv, &bdiv);
#endif
@@
-403,7
+411,7
@@
int serial_init_dev (unsigned long base)
#ifdef CONFIG_405EP
reg = mfdcr(cpc0_ucr) & ~(UCR0_MASK | UCR1_MASK);
clk = gd->cpu_clk;
#ifdef CONFIG_405EP
reg = mfdcr(cpc0_ucr) & ~(UCR0_MASK | UCR1_MASK);
clk = gd->cpu_clk;
- tmp = C
FG
_BASE_BAUD * 16;
+ tmp = C
ONFIG_SYS
_BASE_BAUD * 16;
udiv = (clk + tmp / 2) / tmp;
if (udiv > UDIV_MAX) /* max. n bits for udiv */
udiv = UDIV_MAX;
udiv = (clk + tmp / 2) / tmp;
if (udiv > UDIV_MAX) /* max. n bits for udiv */
udiv = UDIV_MAX;
@@
-412,16
+420,16
@@
int serial_init_dev (unsigned long base)
mtdcr (cpc0_ucr, reg);
#else /* CONFIG_405EP */
reg = mfdcr(cntrl0) & ~CR0_MASK;
mtdcr (cpc0_ucr, reg);
#else /* CONFIG_405EP */
reg = mfdcr(cntrl0) & ~CR0_MASK;
-#ifdef C
FG
_EXT_SERIAL_CLOCK
- clk = C
FG
_EXT_SERIAL_CLOCK;
+#ifdef C
ONFIG_SYS
_EXT_SERIAL_CLOCK
+ clk = C
ONFIG_SYS
_EXT_SERIAL_CLOCK;
udiv = 1;
reg |= CR0_EXTCLK_ENA;
#else
clk = gd->cpu_clk;
udiv = 1;
reg |= CR0_EXTCLK_ENA;
#else
clk = gd->cpu_clk;
-#ifdef C
FG
_405_UART_ERRATA_59
+#ifdef C
ONFIG_SYS
_405_UART_ERRATA_59
udiv = 31; /* Errata 59: stuck at 31 */
#else
udiv = 31; /* Errata 59: stuck at 31 */
#else
- tmp = C
FG
_BASE_BAUD * 16;
+ tmp = C
ONFIG_SYS
_BASE_BAUD * 16;
udiv = (clk + tmp / 2) / tmp;
if (udiv > UDIV_MAX) /* max. n bits for udiv */
udiv = UDIV_MAX;
udiv = (clk + tmp / 2) / tmp;
if (udiv > UDIV_MAX) /* max. n bits for udiv */
udiv = UDIV_MAX;