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Merge commit 'wd/master'
[oweals/u-boot.git]
/
cpu
/
ppc4xx
/
4xx_pci.c
diff --git
a/cpu/ppc4xx/4xx_pci.c
b/cpu/ppc4xx/4xx_pci.c
index c28c7ac86dd64e440ea4e3e601e13ec2f2dfc684..e8871fc4599e3463df45ac57650d9389bef0388a 100644
(file)
--- a/
cpu/ppc4xx/4xx_pci.c
+++ b/
cpu/ppc4xx/4xx_pci.c
@@
-108,12
+108,12
@@
void pci_405gp_init(struct pci_controller *hose)
bd_t *bd = gd->bd;
unsigned short temp_short;
bd_t *bd = gd->bd;
unsigned short temp_short;
- unsigned long ptmpcila[2] = {C
FG_PCI_PTM1PCI, CFG
_PCI_PTM2PCI};
+ unsigned long ptmpcila[2] = {C
ONFIG_SYS_PCI_PTM1PCI, CONFIG_SYS
_PCI_PTM2PCI};
#if defined(CONFIG_CPCI405) || defined(CONFIG_PMC405)
char *ptmla_str, *ptmms_str;
#endif
#if defined(CONFIG_CPCI405) || defined(CONFIG_PMC405)
char *ptmla_str, *ptmms_str;
#endif
- unsigned long ptmla[2] = {C
FG_PCI_PTM1LA, CFG
_PCI_PTM2LA};
- unsigned long ptmms[2] = {C
FG_PCI_PTM1MS, CFG
_PCI_PTM2MS};
+ unsigned long ptmla[2] = {C
ONFIG_SYS_PCI_PTM1LA, CONFIG_SYS
_PCI_PTM2LA};
+ unsigned long ptmms[2] = {C
ONFIG_SYS_PCI_PTM1MS, CONFIG_SYS
_PCI_PTM2MS};
#if defined(CONFIG_PIP405) || defined (CONFIG_MIP405)
unsigned long pmmla[3] = {0x80000000, 0xA0000000, 0};
unsigned long pmmma[3] = {0xE0000001, 0xE0000001, 0};
#if defined(CONFIG_PIP405) || defined (CONFIG_MIP405)
unsigned long pmmla[3] = {0x80000000, 0xA0000000, 0};
unsigned long pmmma[3] = {0xE0000001, 0xE0000001, 0};
@@
-268,25
+268,25
@@
void pci_405gp_init(struct pci_controller *hose)
/*
* Insert Subsystem Vendor and Device ID
*/
/*
* Insert Subsystem Vendor and Device ID
*/
- pci_write_config_word(PCIDEVID_405GP, PCI_SUBSYSTEM_VENDOR_ID, C
FG
_PCI_SUBSYS_VENDORID);
+ pci_write_config_word(PCIDEVID_405GP, PCI_SUBSYSTEM_VENDOR_ID, C
ONFIG_SYS
_PCI_SUBSYS_VENDORID);
#ifdef CONFIG_CPCI405
if (mfdcr(strap) & PSR_PCI_ARBIT_EN)
#ifdef CONFIG_CPCI405
if (mfdcr(strap) & PSR_PCI_ARBIT_EN)
- pci_write_config_word(PCIDEVID_405GP, PCI_SUBSYSTEM_ID, C
FG
_PCI_SUBSYS_DEVICEID);
+ pci_write_config_word(PCIDEVID_405GP, PCI_SUBSYSTEM_ID, C
ONFIG_SYS
_PCI_SUBSYS_DEVICEID);
else
else
- pci_write_config_word(PCIDEVID_405GP, PCI_SUBSYSTEM_ID, C
FG
_PCI_SUBSYS_DEVICEID2);
+ pci_write_config_word(PCIDEVID_405GP, PCI_SUBSYSTEM_ID, C
ONFIG_SYS
_PCI_SUBSYS_DEVICEID2);
#else
#else
- pci_write_config_word(PCIDEVID_405GP, PCI_SUBSYSTEM_ID, C
FG
_PCI_SUBSYS_DEVICEID);
+ pci_write_config_word(PCIDEVID_405GP, PCI_SUBSYSTEM_ID, C
ONFIG_SYS
_PCI_SUBSYS_DEVICEID);
#endif
/*
* Insert Class-code
*/
#endif
/*
* Insert Class-code
*/
-#ifdef C
FG
_PCI_CLASSCODE
- pci_write_config_word(PCIDEVID_405GP, PCI_CLASS_SUB_CODE, C
FG
_PCI_CLASSCODE);
-#endif /* C
FG
_PCI_CLASSCODE */
+#ifdef C
ONFIG_SYS
_PCI_CLASSCODE
+ pci_write_config_word(PCIDEVID_405GP, PCI_CLASS_SUB_CODE, C
ONFIG_SYS
_PCI_CLASSCODE);
+#endif /* C
ONFIG_SYS
_PCI_CLASSCODE */
/*--------------------------------------------------------------------------+
/*--------------------------------------------------------------------------+
- * If PCI speed = 66M
hz, set 66Mh
z capable bit.
+ * If PCI speed = 66M
Hz, set 66MH
z capable bit.
*--------------------------------------------------------------------------*/
if (bd->bi_pci_busfreq >= 66000000) {
pci_read_config_word(PCIDEVID_405GP, PCI_STATUS, &temp_short);
*--------------------------------------------------------------------------*/
if (bd->bi_pci_busfreq >= 66000000) {
pci_read_config_word(PCIDEVID_405GP, PCI_STATUS, &temp_short);
@@
-405,8
+405,8
@@
void pci_405gp_setup_vga(struct pci_controller *hose, pci_dev_t dev,
*/
static struct pci_config_table pci_405gp_config_table[] = {
/*if VendID is 0 it terminates the table search (ie Walnut)*/
*/
static struct pci_config_table pci_405gp_config_table[] = {
/*if VendID is 0 it terminates the table search (ie Walnut)*/
-#ifdef C
FG
_PCI_SUBSYS_VENDORID
- {C
FG
_PCI_SUBSYS_VENDORID, PCI_ANY_ID, PCI_CLASS_BRIDGE_HOST,
+#ifdef C
ONFIG_SYS
_PCI_SUBSYS_VENDORID
+ {C
ONFIG_SYS
_PCI_SUBSYS_VENDORID, PCI_ANY_ID, PCI_CLASS_BRIDGE_HOST,
PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, pci_405gp_setup_bridge},
#endif
{PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA,
PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, pci_405gp_setup_bridge},
#endif
{PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA,
@@
-488,10
+488,10
@@
int pci_440_init (struct pci_controller *hose)
/* PCI memory space */
pci_set_region(hose->regions + reg_num++,
/* PCI memory space */
pci_set_region(hose->regions + reg_num++,
- C
FG
_PCI_TARGBASE,
- C
FG
_PCI_MEMBASE,
-#ifdef C
FG
_PCI_MEMSIZE
- C
FG
_PCI_MEMSIZE,
+ C
ONFIG_SYS
_PCI_TARGBASE,
+ C
ONFIG_SYS
_PCI_MEMBASE,
+#ifdef C
ONFIG_SYS
_PCI_MEMSIZE
+ C
ONFIG_SYS
_PCI_MEMSIZE,
#else
0x10000000,
#endif
#else
0x10000000,
#endif
@@
-523,11
+523,11
@@
int pci_440_init (struct pci_controller *hose)
/*--------------------------------------------------------------------------+
* PCI target init
*--------------------------------------------------------------------------*/
/*--------------------------------------------------------------------------+
* PCI target init
*--------------------------------------------------------------------------*/
-#if defined(C
FG
_PCI_TARGET_INIT)
+#if defined(C
ONFIG_SYS
_PCI_TARGET_INIT)
pci_target_init(hose); /* Let board setup pci target */
#else
pci_target_init(hose); /* Let board setup pci target */
#else
- out16r( PCIX0_SBSYSVID, C
FG
_PCI_SUBSYS_VENDORID );
- out16r( PCIX0_SBSYSID, C
FG
_PCI_SUBSYS_ID );
+ out16r( PCIX0_SBSYSVID, C
ONFIG_SYS
_PCI_SUBSYS_VENDORID );
+ out16r( PCIX0_SBSYSID, C
ONFIG_SYS
_PCI_SUBSYS_ID );
out16r( PCIX0_CLS, 0x00060000 ); /* Bridge, host bridge */
#endif
out16r( PCIX0_CLS, 0x00060000 ); /* Bridge, host bridge */
#endif
@@
-542,9
+542,9
@@
int pci_440_init (struct pci_controller *hose)
/*--------------------------------------------------------------------------+
* PCI master init: default is one 256MB region for PCI memory:
/*--------------------------------------------------------------------------+
* PCI master init: default is one 256MB region for PCI memory:
- * 0x3_00000000 - 0x3_0FFFFFFF ==> C
FG
_PCI_MEMBASE
+ * 0x3_00000000 - 0x3_0FFFFFFF ==> C
ONFIG_SYS
_PCI_MEMBASE
*--------------------------------------------------------------------------*/
*--------------------------------------------------------------------------*/
-#if defined(C
FG
_PCI_MASTER_INIT)
+#if defined(C
ONFIG_SYS
_PCI_MASTER_INIT)
pci_master_init(hose); /* Let board setup pci master */
#else
out32r( PCIX0_POM0SA, 0 ); /* disable */
pci_master_init(hose); /* Let board setup pci master */
#else
out32r( PCIX0_POM0SA, 0 ); /* disable */
@@
-558,7
+558,7
@@
int pci_440_init (struct pci_controller *hose)
out32r( PCIX0_POM0LAL, 0x00000000 );
out32r( PCIX0_POM0LAH, 0x00000003 );
#endif
out32r( PCIX0_POM0LAL, 0x00000000 );
out32r( PCIX0_POM0LAH, 0x00000003 );
#endif
- out32r( PCIX0_POM0PCIAL, C
FG
_PCI_MEMBASE );
+ out32r( PCIX0_POM0PCIAL, C
ONFIG_SYS
_PCI_MEMBASE );
out32r( PCIX0_POM0PCIAH, 0x00000000 );
out32r( PCIX0_POM0SA, 0xf0000001 ); /* 256MB, enabled */
out32r( PCIX0_STS, in32r( PCIX0_STS ) & ~0x0000fff8 );
out32r( PCIX0_POM0PCIAH, 0x00000000 );
out32r( PCIX0_POM0SA, 0xf0000001 ); /* 256MB, enabled */
out32r( PCIX0_STS, in32r( PCIX0_STS ) & ~0x0000fff8 );