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ppc4xx: fdt: Cleanup setup of cpu node setup
[oweals/u-boot.git]
/
cpu
/
ppc4xx
/
44x_spd_ddr.c
diff --git
a/cpu/ppc4xx/44x_spd_ddr.c
b/cpu/ppc4xx/44x_spd_ddr.c
index 0b0c55a44fe6a8f5691537ef0001b494983448f4..b9cf5cbfccaf0b8ebdfa4a32616c2ebd3674cbae 100644
(file)
--- a/
cpu/ppc4xx/44x_spd_ddr.c
+++ b/
cpu/ppc4xx/44x_spd_ddr.c
@@
-251,10
+251,10
@@
void spd_ddr_init_hang (void) __attribute__((weak, alias("__spd_ddr_init_hang"))
* memory.
*
* If at some time this restriction doesn't apply anymore, just define
* memory.
*
* If at some time this restriction doesn't apply anymore, just define
- * C
FG_ENABLE_SDRAM_
CACHE in the board config file and this code should setup
+ * C
ONFIG_4xx_D
CACHE in the board config file and this code should setup
* everything correctly.
*/
* everything correctly.
*/
-#ifdef C
FG_ENABLE_SDRAM_
CACHE
+#ifdef C
ONFIG_4xx_D
CACHE
#define MY_TLB_WORD2_I_ENABLE 0 /* enable caching on SDRAM */
#else
#define MY_TLB_WORD2_I_ENABLE TLB_WORD2_I_ENABLE /* disable caching on SDRAM */
#define MY_TLB_WORD2_I_ENABLE 0 /* enable caching on SDRAM */
#else
#define MY_TLB_WORD2_I_ENABLE TLB_WORD2_I_ENABLE /* disable caching on SDRAM */
@@
-269,7
+269,7
@@
struct bank_param {
typedef struct bank_param BANKPARMS;
#ifdef CFG_SIMULATE_SPD_EEPROM
typedef struct bank_param BANKPARMS;
#ifdef CFG_SIMULATE_SPD_EEPROM
-extern unsigned char cfg_simulate_spd_eeprom[128];
+extern
const
unsigned char cfg_simulate_spd_eeprom[128];
#endif
static unsigned char spd_read(uchar chip, uint addr);
#endif
static unsigned char spd_read(uchar chip, uint addr);
@@
-345,7
+345,7
@@
long int spd_sdram(void) {
*/
check_volt_type(dimm_populated, iic0_dimm_addr, num_dimm_banks);
*/
check_volt_type(dimm_populated, iic0_dimm_addr, num_dimm_banks);
-#if defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR)
|| defined(CONFIG_440SP)
+#if defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR)
/*
* Soft-reset SDRAM controller.
*/
/*
* Soft-reset SDRAM controller.
*/
@@
-645,7
+645,7
@@
static void program_rtr(unsigned long *dimm_populated,
unsigned char refresh_rate_type;
unsigned long refresh_interval;
unsigned long sdram_rtr;
unsigned char refresh_rate_type;
unsigned long refresh_interval;
unsigned long sdram_rtr;
- PPC4
40
_SYS_INFO sys_info;
+ PPC4
xx
_SYS_INFO sys_info;
/*
* get the board info
/*
* get the board info
@@
-721,7
+721,7
@@
static void program_tr0(unsigned long *dimm_populated,
unsigned long tcyc_2_0_ns_x_10;
unsigned long tcyc_reg;
unsigned long bus_period_x_10;
unsigned long tcyc_2_0_ns_x_10;
unsigned long tcyc_reg;
unsigned long bus_period_x_10;
- PPC4
40
_SYS_INFO sys_info;
+ PPC4
xx
_SYS_INFO sys_info;
unsigned long residue;
/*
unsigned long residue;
/*
@@
-1016,7
+1016,7
@@
static int short_mem_test(void)
*/
for (i = 0; i < NUMMEMTESTS; i++) {
for (j = 0; j < NUMMEMWORDS; j++) {
*/
for (i = 0; i < NUMMEMTESTS; i++) {
for (j = 0; j < NUMMEMWORDS; j++) {
-//printf("bank enabled base:%x\n", &membase[j]);
+ /* printf("bank enabled base:%x\n", &membase[j]); */
membase[j] = test[i][j];
ppcDcbf((unsigned long)&(membase[j]));
}
membase[j] = test[i][j];
ppcDcbf((unsigned long)&(membase[j]));
}
@@
-1065,7
+1065,7
@@
static void program_tr1(void)
unsigned char window_found;
unsigned char fail_found;
unsigned char pass_found;
unsigned char window_found;
unsigned char fail_found;
unsigned char pass_found;
- PPC4
40
_SYS_INFO sys_info;
+ PPC4
xx
_SYS_INFO sys_info;
/*
* get the board info
/*
* get the board info
@@
-1197,9
+1197,6
@@
static void program_tr1(void)
}
rdclt_average = ((max_start + max_end) >> 1);
}
rdclt_average = ((max_start + max_end) >> 1);
- if (rdclt_average >= 0x60)
- while (1)
- ;
if (rdclt_average < 0) {
rdclt_average = 0;
if (rdclt_average < 0) {
rdclt_average = 0;