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mpc86xx: Use SRR0/1/rfi to enable address translation, not blr
[oweals/u-boot.git]
/
cpu
/
mpc85xx
/
fdt.c
diff --git
a/cpu/mpc85xx/fdt.c
b/cpu/mpc85xx/fdt.c
index 92952e6d6ef6679446180100023e6f401aa69ada..59aafb1be91aca4e4ac95f01dde91fbc19e6f460 100644
(file)
--- a/
cpu/mpc85xx/fdt.c
+++ b/
cpu/mpc85xx/fdt.c
@@
-29,6
+29,7
@@
#include <asm/processor.h>
extern void ft_qe_setup(void *blob);
#include <asm/processor.h>
extern void ft_qe_setup(void *blob);
+
#ifdef CONFIG_MP
#include "mp.h"
DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_MP
#include "mp.h"
DECLARE_GLOBAL_DATA_PTR;
@@
-82,7
+83,7
@@
void ft_fixup_cpu(void *blob, u64 memory_limit)
/* return size in kilobytes */
static inline u32 l2cache_size(void)
{
/* return size in kilobytes */
static inline u32 l2cache_size(void)
{
- volatile ccsr_l2cache_t *l2cache = (void *)C
FG
_MPC85xx_L2_ADDR;
+ volatile ccsr_l2cache_t *l2cache = (void *)C
ONFIG_SYS
_MPC85xx_L2_ADDR;
volatile u32 l2siz_field = (l2cache->l2ctl >> 28) & 0x3;
u32 ver = SVR_SOC_VER(get_svr());
volatile u32 l2siz_field = (l2cache->l2ctl >> 28) & 0x3;
u32 ver = SVR_SOC_VER(get_svr());
@@
-151,7
+152,6
@@
static inline void ft_fixup_l2cache(void *blob)
}
fdt_setprop(blob, off, "cache-unified", NULL, 0);
fdt_setprop_cell(blob, off, "cache-block-size", line_size);
}
fdt_setprop(blob, off, "cache-unified", NULL, 0);
fdt_setprop_cell(blob, off, "cache-block-size", line_size);
- fdt_setprop_cell(blob, off, "cache-line-size", line_size);
fdt_setprop_cell(blob, off, "cache-size", size);
fdt_setprop_cell(blob, off, "cache-sets", num_sets);
fdt_setprop_cell(blob, off, "cache-level", 2);
fdt_setprop_cell(blob, off, "cache-size", size);
fdt_setprop_cell(blob, off, "cache-sets", num_sets);
fdt_setprop_cell(blob, off, "cache-level", 2);
@@
-180,7
+180,6
@@
static inline void ft_fixup_cache(void *blob)
dnum_sets = dsize / (dline_size * dnum_ways);
fdt_setprop_cell(blob, off, "d-cache-block-size", dline_size);
dnum_sets = dsize / (dline_size * dnum_ways);
fdt_setprop_cell(blob, off, "d-cache-block-size", dline_size);
- fdt_setprop_cell(blob, off, "d-cache-line-size", dline_size);
fdt_setprop_cell(blob, off, "d-cache-size", dsize);
fdt_setprop_cell(blob, off, "d-cache-sets", dnum_sets);
fdt_setprop_cell(blob, off, "d-cache-size", dsize);
fdt_setprop_cell(blob, off, "d-cache-sets", dnum_sets);
@@
-191,7
+190,6
@@
static inline void ft_fixup_cache(void *blob)
inum_sets = isize / (iline_size * inum_ways);
fdt_setprop_cell(blob, off, "i-cache-block-size", iline_size);
inum_sets = isize / (iline_size * inum_ways);
fdt_setprop_cell(blob, off, "i-cache-block-size", iline_size);
- fdt_setprop_cell(blob, off, "i-cache-line-size", iline_size);
fdt_setprop_cell(blob, off, "i-cache-size", isize);
fdt_setprop_cell(blob, off, "i-cache-sets", inum_sets);
fdt_setprop_cell(blob, off, "i-cache-size", isize);
fdt_setprop_cell(blob, off, "i-cache-sets", inum_sets);
@@
-203,11
+201,26
@@
static inline void ft_fixup_cache(void *blob)
}
}
+void fdt_add_enet_stashing(void *fdt)
+{
+ do_fixup_by_compat(fdt, "gianfar", "bd-stash", NULL, 0, 1);
+
+ do_fixup_by_compat_u32(fdt, "gianfar", "rx-stash-len", 96, 1);
+
+ do_fixup_by_compat_u32(fdt, "gianfar", "rx-stash-idx", 0, 1);
+}
+
void ft_cpu_setup(void *blob, bd_t *bd)
{
void ft_cpu_setup(void *blob, bd_t *bd)
{
+ /* delete crypto node if not on an E-processor */
+ if (!IS_E_PROCESSOR(get_svr()))
+ fdt_fixup_crypto_node(blob, 0);
+
#if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) ||\
defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3)
#if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) ||\
defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3)
- fdt_fixup_ethernet(blob, bd);
+ fdt_fixup_ethernet(blob);
+
+ fdt_add_enet_stashing(blob);
#endif
do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
#endif
do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
@@
-222,9
+235,9
@@
void ft_cpu_setup(void *blob, bd_t *bd)
ft_qe_setup(blob);
#endif
ft_qe_setup(blob);
#endif
-#ifdef C
FG
_NS16550
+#ifdef C
ONFIG_SYS
_NS16550
do_fixup_by_compat_u32(blob, "ns16550",
do_fixup_by_compat_u32(blob, "ns16550",
- "clock-frequency",
bd->bi_busfreq
, 1);
+ "clock-frequency",
CONFIG_SYS_NS16550_CLK
, 1);
#endif
#ifdef CONFIG_CPM2
#endif
#ifdef CONFIG_CPM2