projects
/
oweals
/
u-boot.git
/ blobdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
|
commitdiff
|
tree
raw
|
inline
| side by side
Merge branch 'mimc200'
[oweals/u-boot.git]
/
cpu
/
mpc8220
/
start.S
diff --git
a/cpu/mpc8220/start.S
b/cpu/mpc8220/start.S
index b5145ca035d37f0c04e5ff59f994bf61e7fd1e87..3abc619269f44e9a24a2fe8fb76252cee68d8063 100644
(file)
--- a/
cpu/mpc8220/start.S
+++ b/
cpu/mpc8220/start.S
@@
-27,6
+27,7
@@
*/
#include <config.h>
#include <mpc8220.h>
*/
#include <config.h>
#include <mpc8220.h>
+#include <timestamp.h>
#include <version.h>
#define _LINUX_CONFIG_H 1 /* avoid reading Linux autoconf.h file */
#include <version.h>
#define _LINUX_CONFIG_H 1 /* avoid reading Linux autoconf.h file */
@@
-77,7
+78,7
@@
.globl version_string
version_string:
.ascii U_BOOT_VERSION
.globl version_string
version_string:
.ascii U_BOOT_VERSION
- .ascii " (",
__DATE__, " - ", __TIME__
, ")"
+ .ascii " (",
U_BOOT_DATE, " - ", U_BOOT_TIME
, ")"
.ascii CONFIG_IDENT_STRING, "\0"
/*
.ascii CONFIG_IDENT_STRING, "\0"
/*
@@
-105,16
+106,16
@@
boot_warm:
/* replace default MBAR base address from 0x80000000
to 0xf0000000 */
/* replace default MBAR base address from 0x80000000
to 0xf0000000 */
-#if defined(C
FG_DEFAULT_MBAR) && !defined(CFG
_RAMBOOT)
- lis r3, C
FG
_MBAR@h
- ori r3, r3, C
FG
_MBAR@l
+#if defined(C
ONFIG_SYS_DEFAULT_MBAR) && !defined(CONFIG_SYS
_RAMBOOT)
+ lis r3, C
ONFIG_SYS
_MBAR@h
+ ori r3, r3, C
ONFIG_SYS
_MBAR@l
/* MBAR is mirrored into the MBAR SPR */
mtspr MBAR,r3
mtspr SPRN_SPRG7W,r3
/* MBAR is mirrored into the MBAR SPR */
mtspr MBAR,r3
mtspr SPRN_SPRG7W,r3
- lis r4, C
FG
_DEFAULT_MBAR@h
+ lis r4, C
ONFIG_SYS
_DEFAULT_MBAR@h
stw r3, 0(r4)
stw r3, 0(r4)
-#endif /* C
FG
_DEFAULT_MBAR */
+#endif /* C
ONFIG_SYS
_DEFAULT_MBAR */
/* Initialise the MPC8220 processor core */
/*--------------------------------------------------------------*/
/* Initialise the MPC8220 processor core */
/*--------------------------------------------------------------*/
@@
-125,9
+126,9
@@
boot_warm:
/*--------------------------------------------------------------*/
/* set up stack in on-chip SRAM */
/*--------------------------------------------------------------*/
/* set up stack in on-chip SRAM */
- lis r3, C
FG
_INIT_RAM_ADDR@h
- ori r3, r3, C
FG
_INIT_RAM_ADDR@l
- ori r1, r3, C
FG
_INIT_SP_OFFSET
+ lis r3, C
ONFIG_SYS
_INIT_RAM_ADDR@h
+ ori r3, r3, C
ONFIG_SYS
_INIT_RAM_ADDR@l
+ ori r1, r3, C
ONFIG_SYS
_INIT_SP_OFFSET
li r0, 0 /* Make room for stack frame header and */
stwu r0, -4(r1) /* clear final stack frame so that */
li r0, 0 /* Make room for stack frame header and */
stwu r0, -4(r1) /* clear final stack frame so that */
@@
-361,13
+362,13
@@
init_8220_core:
/* HID0 also contains cache control */
/*--------------------------------------------------------------*/
/* HID0 also contains cache control */
/*--------------------------------------------------------------*/
- lis r3, C
FG
_HID0_INIT@h
- ori r3, r3, C
FG
_HID0_INIT@l
+ lis r3, C
ONFIG_SYS
_HID0_INIT@h
+ ori r3, r3, C
ONFIG_SYS
_HID0_INIT@l
SYNC
mtspr HID0, r3
SYNC
mtspr HID0, r3
- lis r3, C
FG
_HID0_FINAL@h
- ori r3, r3, C
FG
_HID0_FINAL@l
+ lis r3, C
ONFIG_SYS
_HID0_FINAL@h
+ ori r3, r3, C
ONFIG_SYS
_HID0_FINAL@l
SYNC
mtspr HID0, r3
SYNC
mtspr HID0, r3
@@
-458,7
+459,7
@@
init_8220_core:
.globl icache_enable
icache_enable:
lis r4, 0
.globl icache_enable
icache_enable:
lis r4, 0
- ori r4, r4, C
FG_HID0_INIT /* set ICE & ICFI bit
*/
+ ori r4, r4, C
ONFIG_SYS_HID0_INIT /* set ICE & ICFI bit
*/
rlwinm r3, r4, 0, 21, 19 /* clear the ICFI bit */
/*
rlwinm r3, r4, 0, 21, 19 /* clear the ICFI bit */
/*
@@
-547,16
+548,16
@@
relocate_code:
mr r10, r5 /* Save copy of Destination Address */
mr r3, r5 /* Destination Address */
mr r10, r5 /* Save copy of Destination Address */
mr r3, r5 /* Destination Address */
- lis r4, C
FG_MONITOR_BASE@h
/* Source Address */
- ori r4, r4, C
FG
_MONITOR_BASE@l
+ lis r4, C
ONFIG_SYS_MONITOR_BASE@h
/* Source Address */
+ ori r4, r4, C
ONFIG_SYS
_MONITOR_BASE@l
lwz r5, GOT(__init_end)
sub r5, r5, r4
lwz r5, GOT(__init_end)
sub r5, r5, r4
- li r6, C
FG_CACHELINE_SIZE
/* Cache Line Size */
+ li r6, C
ONFIG_SYS_CACHELINE_SIZE
/* Cache Line Size */
/*
* Fix GOT pointer:
*
/*
* Fix GOT pointer:
*
- * New GOT-PTR = (old GOT-PTR - C
FG
_MONITOR_BASE) + Destination Address
+ * New GOT-PTR = (old GOT-PTR - C
ONFIG_SYS
_MONITOR_BASE) + Destination Address
*
* Offset:
*/
*
* Offset:
*/