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Align end of bss by 4 bytes
[oweals/u-boot.git]
/
cpu
/
mpc5xxx
/
start.S
diff --git
a/cpu/mpc5xxx/start.S
b/cpu/mpc5xxx/start.S
index 9b1bd48c7338299dfd98ecd5c4b81b7ddb70db61..defe77d75f2f49aebc2c38066e4d1f741779e05a 100644
(file)
--- a/
cpu/mpc5xxx/start.S
+++ b/
cpu/mpc5xxx/start.S
@@
-106,19
+106,19
@@
boot_warm:
/* Move CSBoot and adjust instruction pointer */
/*--------------------------------------------------------------*/
/* Move CSBoot and adjust instruction pointer */
/*--------------------------------------------------------------*/
-#if defined(C
FG
_LOWBOOT)
-# if defined(C
FG
_RAMBOOT)
-# error C
FG_LOWBOOT is incompatible with CFG
_RAMBOOT
-# endif /* C
FG
_RAMBOOT */
+#if defined(C
ONFIG_SYS
_LOWBOOT)
+# if defined(C
ONFIG_SYS
_RAMBOOT)
+# error C
ONFIG_SYS_LOWBOOT is incompatible with CONFIG_SYS
_RAMBOOT
+# endif /* C
ONFIG_SYS
_RAMBOOT */
# if defined(CONFIG_MGT5100)
# if defined(CONFIG_MGT5100)
-# error C
FG
_LOWBOOT is incompatible with MGT5100
+# error C
ONFIG_SYS
_LOWBOOT is incompatible with MGT5100
# endif /* CONFIG_MGT5100 */
# endif /* CONFIG_MGT5100 */
- lis r4, C
FG
_DEFAULT_MBAR@h
- lis r3, START_REG(C
FG
_BOOTCS_START)@h
- ori r3, r3, START_REG(C
FG
_BOOTCS_START)@l
+ lis r4, C
ONFIG_SYS
_DEFAULT_MBAR@h
+ lis r3, START_REG(C
ONFIG_SYS
_BOOTCS_START)@h
+ ori r3, r3, START_REG(C
ONFIG_SYS
_BOOTCS_START)@l
stw r3, 0x4(r4) /* CS0 start */
stw r3, 0x4(r4) /* CS0 start */
- lis r3, STOP_REG(C
FG_BOOTCS_START, CFG
_BOOTCS_SIZE)@h
- ori r3, r3, STOP_REG(C
FG_BOOTCS_START, CFG
_BOOTCS_SIZE)@l
+ lis r3, STOP_REG(C
ONFIG_SYS_BOOTCS_START, CONFIG_SYS
_BOOTCS_SIZE)@h
+ ori r3, r3, STOP_REG(C
ONFIG_SYS_BOOTCS_START, CONFIG_SYS
_BOOTCS_SIZE)@l
stw r3, 0x8(r4) /* CS0 stop */
lis r3, 0x02010000@h
ori r3, r3, 0x02010000@l
stw r3, 0x8(r4) /* CS0 stop */
lis r3, 0x02010000@h
ori r3, r3, 0x02010000@l
@@
-130,20
+130,20
@@
boot_warm:
blr
lowboot_reentry:
blr
lowboot_reentry:
- lis r3, START_REG(C
FG
_BOOTCS_START)@h
- ori r3, r3, START_REG(C
FG
_BOOTCS_START)@l
+ lis r3, START_REG(C
ONFIG_SYS
_BOOTCS_START)@h
+ ori r3, r3, START_REG(C
ONFIG_SYS
_BOOTCS_START)@l
stw r3, 0x4c(r4) /* Boot start */
stw r3, 0x4c(r4) /* Boot start */
- lis r3, STOP_REG(C
FG_BOOTCS_START, CFG
_BOOTCS_SIZE)@h
- ori r3, r3, STOP_REG(C
FG_BOOTCS_START, CFG
_BOOTCS_SIZE)@l
+ lis r3, STOP_REG(C
ONFIG_SYS_BOOTCS_START, CONFIG_SYS
_BOOTCS_SIZE)@h
+ ori r3, r3, STOP_REG(C
ONFIG_SYS_BOOTCS_START, CONFIG_SYS
_BOOTCS_SIZE)@l
stw r3, 0x50(r4) /* Boot stop */
lis r3, 0x02000001@h
ori r3, r3, 0x02000001@l
stw r3, 0x54(r4) /* Boot enable, CS0 disable */
stw r3, 0x50(r4) /* Boot stop */
lis r3, 0x02000001@h
ori r3, r3, 0x02000001@l
stw r3, 0x54(r4) /* Boot enable, CS0 disable */
-#endif /* C
FG
_LOWBOOT */
+#endif /* C
ONFIG_SYS
_LOWBOOT */
-#if defined(C
FG_DEFAULT_MBAR) && !defined(CFG
_RAMBOOT)
- lis r3, C
FG
_MBAR@h
- ori r3, r3, C
FG
_MBAR@l
+#if defined(C
ONFIG_SYS_DEFAULT_MBAR) && !defined(CONFIG_SYS
_RAMBOOT)
+ lis r3, C
ONFIG_SYS
_MBAR@h
+ ori r3, r3, C
ONFIG_SYS
_MBAR@l
#if defined(CONFIG_MPC5200)
/* MBAR is mirrored into the MBAR SPR */
mtspr MBAR,r3
#if defined(CONFIG_MPC5200)
/* MBAR is mirrored into the MBAR SPR */
mtspr MBAR,r3
@@
-152,9
+152,9
@@
lowboot_reentry:
#if defined(CONFIG_MGT5100)
rlwinm r3, r3, 17, 15, 31
#endif
#if defined(CONFIG_MGT5100)
rlwinm r3, r3, 17, 15, 31
#endif
- lis r4, C
FG
_DEFAULT_MBAR@h
+ lis r4, C
ONFIG_SYS
_DEFAULT_MBAR@h
stw r3, 0(r4)
stw r3, 0(r4)
-#endif /* C
FG
_DEFAULT_MBAR */
+#endif /* C
ONFIG_SYS
_DEFAULT_MBAR */
/* Initialise the MPC5xxx processor core */
/*--------------------------------------------------------------*/
/* Initialise the MPC5xxx processor core */
/*--------------------------------------------------------------*/
@@
-165,9
+165,9
@@
lowboot_reentry:
/*--------------------------------------------------------------*/
/* set up stack in on-chip SRAM */
/*--------------------------------------------------------------*/
/* set up stack in on-chip SRAM */
- lis r3, C
FG
_INIT_RAM_ADDR@h
- ori r3, r3, C
FG
_INIT_RAM_ADDR@l
- ori r1, r3, C
FG
_INIT_SP_OFFSET
+ lis r3, C
ONFIG_SYS
_INIT_RAM_ADDR@h
+ ori r3, r3, C
ONFIG_SYS
_INIT_RAM_ADDR@l
+ ori r1, r3, C
ONFIG_SYS
_INIT_SP_OFFSET
li r0, 0 /* Make room for stack frame header and */
stwu r0, -4(r1) /* clear final stack frame so that */
stwu r0, -4(r1) /* stack backtraces terminate cleanly */
li r0, 0 /* Make room for stack frame header and */
stwu r0, -4(r1) /* clear final stack frame so that */
stwu r0, -4(r1) /* stack backtraces terminate cleanly */
@@
-400,13
+400,13
@@
init_5xxx_core:
/* HID0 also contains cache control */
/*--------------------------------------------------------------*/
/* HID0 also contains cache control */
/*--------------------------------------------------------------*/
- lis r3, C
FG
_HID0_INIT@h
- ori r3, r3, C
FG
_HID0_INIT@l
+ lis r3, C
ONFIG_SYS
_HID0_INIT@h
+ ori r3, r3, C
ONFIG_SYS
_HID0_INIT@l
SYNC
mtspr HID0, r3
SYNC
mtspr HID0, r3
- lis r3, C
FG
_HID0_FINAL@h
- ori r3, r3, C
FG
_HID0_FINAL@l
+ lis r3, C
ONFIG_SYS
_HID0_FINAL@h
+ ori r3, r3, C
ONFIG_SYS
_HID0_FINAL@l
SYNC
mtspr HID0, r3
SYNC
mtspr HID0, r3
@@
-582,16
+582,16
@@
relocate_code:
mr r10, r5 /* Save copy of Destination Address */
mr r3, r5 /* Destination Address */
mr r10, r5 /* Save copy of Destination Address */
mr r3, r5 /* Destination Address */
- lis r4, C
FG_MONITOR_BASE@h
/* Source Address */
- ori r4, r4, C
FG
_MONITOR_BASE@l
+ lis r4, C
ONFIG_SYS_MONITOR_BASE@h
/* Source Address */
+ ori r4, r4, C
ONFIG_SYS
_MONITOR_BASE@l
lwz r5, GOT(__init_end)
sub r5, r5, r4
lwz r5, GOT(__init_end)
sub r5, r5, r4
- li r6, C
FG_CACHELINE_SIZE
/* Cache Line Size */
+ li r6, C
ONFIG_SYS_CACHELINE_SIZE
/* Cache Line Size */
/*
* Fix GOT pointer:
*
/*
* Fix GOT pointer:
*
- * New GOT-PTR = (old GOT-PTR - C
FG
_MONITOR_BASE) + Destination Address
+ * New GOT-PTR = (old GOT-PTR - C
ONFIG_SYS
_MONITOR_BASE) + Destination Address
*
* Offset:
*/
*
* Offset:
*/