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Merge branch 'master' of ssh://gemini/home/wd/git/u-boot/master
[oweals/u-boot.git]
/
cpu
/
mcf52x2
/
cpu_init.c
diff --git
a/cpu/mcf52x2/cpu_init.c
b/cpu/mcf52x2/cpu_init.c
index 18308c8a7ab7e332e6b6386d266dad853c05eaf8..11f70b0dbf21bbf0896e406eeaa60f4b490fc987 100644
(file)
--- a/
cpu/mcf52x2/cpu_init.c
+++ b/
cpu/mcf52x2/cpu_init.c
@@
-131,7
+131,7
@@
void cpu_init_f(void)
mbar2_writeByte(MCFSIM_INTBASE, 0x40); /* Base interrupts at 64 */
mbar2_writeByte(MCFSIM_SPURVEC, 0x00);
mbar2_writeByte(MCFSIM_INTBASE, 0x40); /* Base interrupts at 64 */
mbar2_writeByte(MCFSIM_SPURVEC, 0x00);
- /*mbar2_writeLong(MCFSIM_IDECONFIG1, 0x00000020); *//* Enable a 1 cycle pre-drive cycle on CS1 */
+ /*mbar2_writeLong(MCFSIM_IDECONFIG1, 0x00000020); */
/* Enable a 1 cycle pre-drive cycle on CS1 */
/* FlexBus Chipselect */
init_fbcs();
/* FlexBus Chipselect */
init_fbcs();
@@
-181,9
+181,14
@@
void cpu_init_f(void)
/* FlexBus Chipselect */
init_fbcs();
/* FlexBus Chipselect */
init_fbcs();
+#ifdef CONFIG_SYS_MCF_SYNCR
+ /* Set clockspeed according to board header file */
+ mbar_writeLong(MCF_FMPLL_SYNCR, CONFIG_SYS_MCF_SYNCR);
+#else
/* Set clockspeed to 100MHz */
/* Set clockspeed to 100MHz */
- mbar_write
Short
(MCF_FMPLL_SYNCR,
+ mbar_write
Long
(MCF_FMPLL_SYNCR,
MCF_FMPLL_SYNCR_MFD(0) | MCF_FMPLL_SYNCR_RFD(0));
MCF_FMPLL_SYNCR_MFD(0) | MCF_FMPLL_SYNCR_RFD(0));
+#endif
while (!mbar_readByte(MCF_FMPLL_SYNSR) & MCF_FMPLL_SYNSR_LOCK) ;
}
while (!mbar_readByte(MCF_FMPLL_SYNSR) & MCF_FMPLL_SYNSR_LOCK) ;
}
@@
-219,7
+224,8
@@
int fecpin_setclear(struct eth_device *dev, int setclear)
{
if (setclear) {
/* Enable Ethernet pins */
{
if (setclear) {
/* Enable Ethernet pins */
- mbar_writeByte(MCF_GPIO_PAR_FECI2C, CONFIG_SYS_FECI2C);
+ mbar_writeByte(MCF_GPIO_PAR_FECI2C,
+ (mbar_readByte(MCF_GPIO_PAR_FECI2C) | 0xF0));
} else {
}
} else {
}