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Remove compiler warning: target CPU does not support interworking
[oweals/u-boot.git]
/
cpu
/
arm720t
/
cpu.c
diff --git
a/cpu/arm720t/cpu.c
b/cpu/arm720t/cpu.c
index 5421aff7def4569b2caa9237eb81b94d4bad6abf..5ac8f59ab3caf2f1b551fc919b0ff64d3e814d52 100644
(file)
--- a/
cpu/arm720t/cpu.c
+++ b/
cpu/arm720t/cpu.c
@@
-41,7
+41,7
@@
int cpu_init (void)
* setup up stacks if necessary
*/
#ifdef CONFIG_USE_IRQ
* setup up stacks if necessary
*/
#ifdef CONFIG_USE_IRQ
- IRQ_STACK_START = _armboot_start - C
FG_MALLOC_LEN - CFG
_GBL_DATA_SIZE - 4;
+ IRQ_STACK_START = _armboot_start - C
ONFIG_SYS_MALLOC_LEN - CONFIG_SYS
_GBL_DATA_SIZE - 4;
FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
#endif
return 0;
FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
#endif
return 0;
@@
-57,7
+57,7
@@
int cleanup_before_linux (void)
* and we set the CPU-speed to 73 MHz - see start.S for details
*/
* and we set the CPU-speed to 73 MHz - see start.S for details
*/
-#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312)
+#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312)
|| defined(CONFIG_ARMADILLO)
unsigned long i;
disable_interrupts ();
unsigned long i;
disable_interrupts ();
@@
-73,9
+73,11
@@
int cleanup_before_linux (void)
/* go to high speed */
IO_SYSCON3 = (IO_SYSCON3 & ~CLKCTL) | CLKCTL_73;
#endif
/* go to high speed */
IO_SYSCON3 = (IO_SYSCON3 & ~CLKCTL) | CLKCTL_73;
#endif
-#elif defined(CONFIG_NETARM) || defined(CONFIG_S3C4510B)
+#elif defined(CONFIG_NETARM) || defined(CONFIG_S3C4510B)
|| defined(CONFIG_LPC2292)
disable_interrupts ();
/* Nothing more needed */
disable_interrupts ();
/* Nothing more needed */
+#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
+ /* No cleanup before linux for IntegratorAP/CM720T as yet */
#else
#error No cleanup_before_linux() defined for this CPU type
#endif
#else
#error No cleanup_before_linux() defined for this CPU type
#endif
@@
-95,7
+97,7
@@
int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
*
*/
*
*/
-#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_NETARM)
+#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_NETARM)
|| defined(CONFIG_ARMADILLO)
/* read co-processor 15, register #1 (control register) */
static unsigned long read_p15_c1(void)
{
/* read co-processor 15, register #1 (control register) */
static unsigned long read_p15_c1(void)
{
@@
-245,6
+247,12
@@
int dcache_status (void)
return icache_status();
}
return icache_status();
}
+#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
+ /* No specific cache setup for IntegratorAP/CM720T as yet */
+ void icache_enable (void)
+ {
+ }
+#elif defined(CONFIG_LPC2292) /* just to satisfy the compiler */
#else
#error No icache/dcache enable/disable functions defined for this CPU type
#endif
#else
#error No icache/dcache enable/disable functions defined for this CPU type
#endif