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Use strmhz() to format clock frequencies
[oweals/u-boot.git]
/
board
/
sbc8560
/
tlb.c
diff --git
a/board/sbc8560/tlb.c
b/board/sbc8560/tlb.c
index 155ff64bbba9c3e034c46c6ebf1689751e6e0f8f..fe0ac763af21d19131617f260f12026fa786e750 100644
(file)
--- a/
board/sbc8560/tlb.c
+++ b/
board/sbc8560/tlb.c
@@
-28,7
+28,7
@@
struct fsl_e_tlb_entry tlb_table[] = {
/* TLB for CCSRBAR (IMMR) */
struct fsl_e_tlb_entry tlb_table[] = {
/* TLB for CCSRBAR (IMMR) */
- SET_TLB_ENTRY(1, C
FG_CCSRBAR, CFG_CCSRBAR
,
+ SET_TLB_ENTRY(1, C
ONFIG_SYS_CCSRBAR, CONFIG_SYS_CCSRBAR_PHYS
,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 1, BOOKE_PAGESZ_1M, 1),
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 1, BOOKE_PAGESZ_1M, 1),
@@
-44,20
+44,20
@@
struct fsl_e_tlb_entry tlb_table[] = {
0, 3, BOOKE_PAGESZ_256M, 1),
#if !defined(CONFIG_SPD_EEPROM)
0, 3, BOOKE_PAGESZ_256M, 1),
#if !defined(CONFIG_SPD_EEPROM)
- SET_TLB_ENTRY(1, C
FG_DDR_SDRAM_BASE, CFG
_DDR_SDRAM_BASE,
+ SET_TLB_ENTRY(1, C
ONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS
_DDR_SDRAM_BASE,
MAS3_SX|MAS3_SW|MAS3_SR, 0,
0, 4, BOOKE_PAGESZ_256M, 1),
MAS3_SX|MAS3_SW|MAS3_SR, 0,
0, 4, BOOKE_PAGESZ_256M, 1),
- SET_TLB_ENTRY(1, C
FG_DDR_SDRAM_BASE + 0x10000000, CFG
_DDR_SDRAM_BASE + 0x10000000,
+ SET_TLB_ENTRY(1, C
ONFIG_SYS_DDR_SDRAM_BASE + 0x10000000, CONFIG_SYS
_DDR_SDRAM_BASE + 0x10000000,
MAS3_SX|MAS3_SW|MAS3_SR, 0,
0, 5, BOOKE_PAGESZ_256M, 1),
#endif
MAS3_SX|MAS3_SW|MAS3_SR, 0,
0, 5, BOOKE_PAGESZ_256M, 1),
#endif
- SET_TLB_ENTRY(1, C
FG_INIT_RAM_ADDR, CFG
_INIT_RAM_ADDR,
+ SET_TLB_ENTRY(1, C
ONFIG_SYS_INIT_RAM_ADDR, CONFIG_SYS
_INIT_RAM_ADDR,
MAS3_SX|MAS3_SW|MAS3_SR, 0,
0, 6, BOOKE_PAGESZ_16K, 1),
MAS3_SX|MAS3_SW|MAS3_SR, 0,
0, 6, BOOKE_PAGESZ_16K, 1),
- SET_TLB_ENTRY(1, C
FG_PCI_MEM_PHYS, CFG
_PCI_MEM_PHYS,
+ SET_TLB_ENTRY(1, C
ONFIG_SYS_PCI_MEM_PHYS, CONFIG_SYS
_PCI_MEM_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 7, BOOKE_PAGESZ_256M, 1),
};
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 7, BOOKE_PAGESZ_256M, 1),
};