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Merge branch 'master' of git://git.denx.de/u-boot-blackfin
[oweals/u-boot.git]
/
board
/
mpl
/
pip405
/
pip405.c
diff --git
a/board/mpl/pip405/pip405.c
b/board/mpl/pip405/pip405.c
index b4715aada36d2064785acde4d3e3da87d0049e3c..677437d09ea99526698509403cddf7b54c439524 100644
(file)
--- a/
board/mpl/pip405/pip405.c
+++ b/
board/mpl/pip405/pip405.c
@@
-28,9
+28,12
@@
#include "pip405.h"
#include <asm/processor.h>
#include <i2c.h>
#include "pip405.h"
#include <asm/processor.h>
#include <i2c.h>
+#include <stdio_dev.h>
#include "../common/isa.h"
#include "../common/common_util.h"
#include "../common/isa.h"
#include "../common/common_util.h"
+DECLARE_GLOBAL_DATA_PTR;
+
#undef SDRAM_DEBUG
#define FALSE 0
#undef SDRAM_DEBUG
#define FALSE 0
@@
-134,8
+137,6
@@
unsigned short NSto10PS (unsigned char spd_byte)
void SDRAM_err (const char *s)
{
#ifndef SDRAM_DEBUG
void SDRAM_err (const char *s)
{
#ifndef SDRAM_DEBUG
- DECLARE_GLOBAL_DATA_PTR;
-
(void) get_clocks ();
gd->baudrate = 9600;
serial_init ();
(void) get_clocks ();
gd->baudrate = 9600;
serial_init ();
@@
-176,11
+177,11
@@
void write_4hex (unsigned long val)
#endif
#endif
-int board_
pre_init
(void)
+int board_
early_init_f
(void)
{
unsigned char dataout[1];
unsigned char datain[128];
{
unsigned char dataout[1];
unsigned char datain[128];
- unsigned long sdram_size;
+ unsigned long sdram_size
= 0
;
SDRAM_SETUP *t = (SDRAM_SETUP *) sdram_setup_table;
unsigned long memclk;
unsigned long tmemclk = 0;
SDRAM_SETUP *t = (SDRAM_SETUP *) sdram_setup_table;
unsigned long memclk;
unsigned long tmemclk = 0;
@@
-191,9
+192,6
@@
int board_pre_init (void)
trc_clocks, tctp_clocks;
unsigned char cal_index, cal_val, spd_version, spd_chksum;
unsigned char buf[8];
trc_clocks, tctp_clocks;
unsigned char cal_index, cal_val, spd_version, spd_chksum;
unsigned char buf[8];
-#ifdef SDRAM_DEBUG
- DECLARE_GLOBAL_DATA_PTR;
-#endif
/* set up the config port */
mtdcr (ebccfga, pb7ap);
mtdcr (ebccfgd, CONFIG_PORT_AP);
/* set up the config port */
mtdcr (ebccfga, pb7ap);
mtdcr (ebccfgd, CONFIG_PORT_AP);
@@
-211,7
+209,7
@@
int board_pre_init (void)
#endif
/* Read Serial Presence Detect Information */
#endif
/* Read Serial Presence Detect Information */
- i2c_init (C
FG_I2C_SPEED, CFG
_I2C_SLAVE);
+ i2c_init (C
ONFIG_SYS_I2C_SPEED, CONFIG_SYS
_I2C_SLAVE);
dataout[0] = 0;
for (i = 0; i < 128; i++)
datain[i] = 127;
dataout[0] = 0;
for (i = 0; i < 128; i++)
datain[i] = 127;
@@
-255,7
+253,7
@@
int board_pre_init (void)
(datain[2] != 0x04) || /* if not SDRAM */
(!((datain[6] == 0x40) || (datain[6] == 0x48))) || /* or not (64 Bit or 72 Bit) */
(datain[7] != 0x00) || (datain[8] != 0x01) || /* or not LVTTL signal levels */
(datain[2] != 0x04) || /* if not SDRAM */
(!((datain[6] == 0x40) || (datain[6] == 0x48))) || /* or not (64 Bit or 72 Bit) */
(datain[7] != 0x00) || (datain[8] != 0x01) || /* or not LVTTL signal levels */
- (datain[126] == 0x66)) /* or a 66M
h
z modules */
+ (datain[126] == 0x66)) /* or a 66M
H
z modules */
SDRAM_err ("unsupported SDRAM");
#ifdef SDRAM_DEBUG
serial_puts ("SDRAM sanity ok\n");
SDRAM_err ("unsupported SDRAM");
#ifdef SDRAM_DEBUG
serial_puts ("SDRAM sanity ok\n");
@@
-389,7
+387,7
@@
int board_pre_init (void)
/* write SDRAM timing register */
mtdcr (memcfga, mem_sdtr1);
mtdcr (memcfgd, tmp);
/* write SDRAM timing register */
mtdcr (memcfga, mem_sdtr1);
mtdcr (memcfgd, tmp);
- baseaddr = C
FG
_SDRAM_BASE;
+ baseaddr = C
ONFIG_SYS
_SDRAM_BASE;
bank_size = (((unsigned long) density) << 22) / 2;
/* insert AM value */
tmp = ((unsigned long) t->mode - 1) << 13;
bank_size = (((unsigned long) density) << 22) / 2;
/* insert AM value */
tmp = ((unsigned long) t->mode - 1) << 13;
@@
-574,15
+572,15
@@
int board_pre_init (void)
int checkboard (void)
{
int checkboard (void)
{
-
unsigned
char s[50];
+ char s[50];
unsigned char bc;
int i;
backup_t *b = (backup_t *) s;
puts ("Board: ");
unsigned char bc;
int i;
backup_t *b = (backup_t *) s;
puts ("Board: ");
- i = getenv_r ("serial#", s, 32);
- if ((i == 0) || strncmp (s, "PIP405", 6)) {
+ i = getenv_r ("serial#",
(char *)
s, 32);
+ if ((i == 0) || strncmp (
(char *)
s, "PIP405", 6)) {
get_backup_values (b);
if (strncmp (b->signature, "MPL\0", 4) != 0) {
puts ("### No HW ID - assuming PIP405");
get_backup_values (b);
if (strncmp (b->signature, "MPL\0", 4) != 0) {
puts ("### No HW ID - assuming PIP405");
@@
-611,10
+609,8
@@
int checkboard (void)
/* ------------------------------------------------------------------------- */
static int test_dram (unsigned long ramsize);
/* ------------------------------------------------------------------------- */
static int test_dram (unsigned long ramsize);
-
long in
t initdram (int board_type)
+
phys_size_
t initdram (int board_type)
{
{
- DECLARE_GLOBAL_DATA_PTR;
-
unsigned long bank_reg[4], tmp, bank_size;
int i, ds;
unsigned long TotalSize;
unsigned long bank_reg[4], tmp, bank_size;
int i, ds;
unsigned long TotalSize;
@@
-666,15
+662,14
@@
extern flash_info_t flash_info[]; /* info for FLASH chips */
int misc_init_r (void)
{
int misc_init_r (void)
{
- DECLARE_GLOBAL_DATA_PTR;
/* adjust flash start and size as well as the offset */
gd->bd->bi_flashstart=0-flash_info[0].size;
/* adjust flash start and size as well as the offset */
gd->bd->bi_flashstart=0-flash_info[0].size;
- gd->bd->bi_flashsize=flash_info[0].size-C
FG
_MONITOR_LEN;
+ gd->bd->bi_flashsize=flash_info[0].size-C
ONFIG_SYS
_MONITOR_LEN;
gd->bd->bi_flashoffset=0;
/* if PIP405 has booted from PCI, reset CCR0[24] as described in errata PCI_18 */
if (mfdcr(strap) & PSR_ROM_LOC)
gd->bd->bi_flashoffset=0;
/* if PIP405 has booted from PCI, reset CCR0[24] as described in errata PCI_18 */
if (mfdcr(strap) & PSR_ROM_LOC)
- mtspr(
ccr0, (mfspr(ccr
0) & ~0x80));
+ mtspr(
SPRN_CCR0, (mfspr(SPRN_CCR
0) & ~0x80));
return (0);
}
return (0);
}
@@
-711,7
+706,7
@@
int last_stage_init (void)
{
print_pip405_rev ();
isa_init ();
{
print_pip405_rev ();
isa_init ();
- s
how_stdio_dev
();
+ s
tdio_print_current_devices
();
check_env();
return 0;
}
check_env();
return 0;
}