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stm32f746-disco: enable flash support
[oweals/u-boot.git]
/
board
/
isee
/
igep00x0
/
igep00x0.c
diff --git
a/board/isee/igep00x0/igep00x0.c
b/board/isee/igep00x0/igep00x0.c
index 6eb191c5e032403df649151e2041ad7b3e8743fb..d1a6a6f56f0211da5f8424ca95d64783150f661e 100644
(file)
--- a/
board/isee/igep00x0/igep00x0.c
+++ b/
board/isee/igep00x0/igep00x0.c
@@
-34,13
+34,13
@@
static const u32 gpmc_lan_config[] = {
#endif
static const struct ns16550_platdata igep_serial = {
#endif
static const struct ns16550_platdata igep_serial = {
- OMAP34XX_UART3,
- 2,
- V_NS16550_CLK
+
.base =
OMAP34XX_UART3,
+
.reg_shift =
2,
+
.clock =
V_NS16550_CLK
};
U_BOOT_DEVICE(igep_uart) = {
};
U_BOOT_DEVICE(igep_uart) = {
- "
serial_omap
",
+ "
ns16550_serial
",
&igep_serial
};
&igep_serial
};
@@
-101,6
+101,19
@@
void get_board_mem_timings(struct board_sdrc_timings *timings)
#endif
#if defined(CONFIG_CMD_NET)
#endif
#if defined(CONFIG_CMD_NET)
+
+static void reset_net_chip(int gpio)
+{
+ if (!gpio_request(gpio, "eth nrst")) {
+ gpio_direction_output(gpio, 1);
+ udelay(1);
+ gpio_set_value(gpio, 0);
+ udelay(40);
+ gpio_set_value(gpio, 1);
+ mdelay(10);
+ }
+}
+
/*
* Routine: setup_net_chip
* Description: Setting up the configuration GPMC registers specific to the
/*
* Routine: setup_net_chip
* Description: Setting up the configuration GPMC registers specific to the
@@
-110,8
+123,8
@@
static void setup_net_chip(void)
{
struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
{
struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
- enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[5],
0x2C000000,
- GPMC_SIZE_16M);
+ enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[5],
+
CONFIG_SMC911X_BASE,
GPMC_SIZE_16M);
/* Enable off mode for NWE in PADCONF_GPMC_NWE register */
writew(readw(&ctrl_base->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe);
/* Enable off mode for NWE in PADCONF_GPMC_NWE register */
writew(readw(&ctrl_base->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe);
@@
-121,15
+134,7
@@
static void setup_net_chip(void)
writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,
&ctrl_base->gpmc_nadv_ale);
writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,
&ctrl_base->gpmc_nadv_ale);
- /* Make GPIO 64 as output pin and send a magic pulse through it */
- if (!gpio_request(64, "")) {
- gpio_direction_output(64, 0);
- gpio_set_value(64, 1);
- udelay(1);
- gpio_set_value(64, 0);
- udelay(1);
- gpio_set_value(64, 1);
- }
+ reset_net_chip(64);
}
#else
static inline void setup_net_chip(void) {}
}
#else
static inline void setup_net_chip(void) {}
@@
-171,7
+176,7
@@
int misc_init_r(void)
setup_net_chip();
setup_net_chip();
-
dieid_num_r
();
+
omap_die_id_display
();
set_fdt();
set_fdt();
@@
-200,10
+205,10
@@
void set_muxconf_regs(void)
#if defined(CONFIG_CMD_NET)
int board_eth_init(bd_t *bis)
{
#if defined(CONFIG_CMD_NET)
int board_eth_init(bd_t *bis)
{
- int rc = 0;
#ifdef CONFIG_SMC911X
#ifdef CONFIG_SMC911X
- rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
+ return smc911x_initialize(0, CONFIG_SMC911X_BASE);
+#else
+ return 0;
#endif
#endif
- return rc;
}
#endif
}
#endif