projects
/
oweals
/
u-boot.git
/ blobdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
|
commitdiff
|
tree
raw
|
inline
| side by side
sandbox: Add sandbox board
[oweals/u-boot.git]
/
board
/
esteem192e
/
esteem192e.c
diff --git
a/board/esteem192e/esteem192e.c
b/board/esteem192e/esteem192e.c
index 3959eead27205bfe37105464e561ef3cb65d80e7..b784cbb5b75b9c8f1f75bf0082d45fa85d634ac6 100644
(file)
--- a/
board/esteem192e/esteem192e.c
+++ b/
board/esteem192e/esteem192e.c
@@
-101,9
+101,9
@@
int checkboard (void)
/* ------------------------------------------------------------------------- */
/* ------------------------------------------------------------------------- */
-
long in
t initdram (int board_type)
+
phys_size_
t initdram (int board_type)
{
{
- volatile immap_t *immap = (immap_t *) C
FG
_IMMR;
+ volatile immap_t *immap = (immap_t *) C
ONFIG_SYS
_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
long int size_b0, size_b1;
volatile memctl8xx_t *memctl = &immap->im_memctl;
long int size_b0, size_b1;
@@
-113,7
+113,7
@@
long int initdram (int board_type)
memctl->memc_mptpr = 0x0200; /* divide by 32 */
memctl->memc_mptpr = 0x0200; /* divide by 32 */
- memctl->memc_mamr = 0x18003112; /*C
FG
_MAMR_8COL; */ /* 0x18005112 TODO: explain here */
+ memctl->memc_mamr = 0x18003112; /*C
ONFIG_SYS
_MAMR_8COL; */ /* 0x18005112 TODO: explain here */
upmconfig (UPMA, (uint *) sdram_table,
sizeof (sdram_table) / sizeof (uint));
upmconfig (UPMA, (uint *) sdram_table,
sizeof (sdram_table) / sizeof (uint));
@@
-124,11
+124,11
@@
long int initdram (int board_type)
* SDRAM size has been determined.
*/
* SDRAM size has been determined.
*/
- memctl->memc_or2 = C
FG_OR2_PRELIM;
/* not defined yet */
- memctl->memc_br2 = C
FG
_BR2_PRELIM;
+ memctl->memc_or2 = C
ONFIG_SYS_OR2_PRELIM;
/* not defined yet */
+ memctl->memc_br2 = C
ONFIG_SYS
_BR2_PRELIM;
- memctl->memc_or3 = C
FG
_OR3_PRELIM;
- memctl->memc_br3 = C
FG
_BR3_PRELIM;
+ memctl->memc_or3 = C
ONFIG_SYS
_OR3_PRELIM;
+ memctl->memc_br3 = C
ONFIG_SYS
_BR3_PRELIM;
/* perform SDRAM initializsation sequence */
/* perform SDRAM initializsation sequence */
@@
-139,7
+139,7
@@
long int initdram (int board_type)
memctl->memc_mcr = 0x80006830; /* SDRAM bank 1 execute 8 refresh */
memctl->memc_mcr = 0x80006105; /* SDRAM bank 1 */
memctl->memc_mcr = 0x80006830; /* SDRAM bank 1 execute 8 refresh */
memctl->memc_mcr = 0x80006105; /* SDRAM bank 1 */
- memctl->memc_mamr = C
FG_MAMR_8COL;
/* 0x18803112 start refresh timer TODO: explain here */
+ memctl->memc_mamr = C
ONFIG_SYS_MAMR_8COL;
/* 0x18803112 start refresh timer TODO: explain here */
/* printf ("banks 0 and 1 are programed\n"); */
/* printf ("banks 0 and 1 are programed\n"); */