+
+/*
+ * Provide SPD values for spd_sdram(). Both boards (VME-CADDY/2
+ * and VME-CADDY/2) have different SDRAM configurations.
+ */
+#ifdef VME_CADDY2
+#define SMALL_RAM 0xff
+#define LARGE_RAM 0x00
+#else
+#define SMALL_RAM 0x00
+#define LARGE_RAM 0xff
+#endif
+
+#define SPD_VAL(a, b) (((a) & SMALL_RAM) | ((b) & LARGE_RAM))
+
+static spd_eeprom_t default_spd_eeprom = {
+ SPD_VAL(0x80, 0x80), /* 00 use 128 Bytes */
+ SPD_VAL(0x07, 0x07), /* 01 use 128 Bytes */
+ SPD_MEMTYPE_DDR2, /* 02 type is DDR2 */
+ SPD_VAL(0x0d, 0x0d), /* 03 rows: 13 */
+ SPD_VAL(0x09, 0x0a), /* 04 cols: 9 / 10 */
+ SPD_VAL(0x00, 0x00), /* 05 */
+ SPD_VAL(0x40, 0x40), /* 06 */
+ SPD_VAL(0x00, 0x00), /* 07 */
+ SPD_VAL(0x05, 0x05), /* 08 */
+ SPD_VAL(0x30, 0x30), /* 09 */
+ SPD_VAL(0x45, 0x45), /* 10 */
+ SPD_VAL(0x02, 0x02), /* 11 ecc used */
+ SPD_VAL(0x82, 0x82), /* 12 */
+ SPD_VAL(0x10, 0x10), /* 13 */
+ SPD_VAL(0x08, 0x08), /* 14 */
+ SPD_VAL(0x00, 0x00), /* 15 */
+ SPD_VAL(0x0c, 0x0c), /* 16 */
+ SPD_VAL(0x04, 0x08), /* 17 banks: 4 / 8 */
+ SPD_VAL(0x38, 0x38), /* 18 */
+ SPD_VAL(0x00, 0x00), /* 19 */
+ SPD_VAL(0x02, 0x02), /* 20 */
+ SPD_VAL(0x00, 0x00), /* 21 */
+ SPD_VAL(0x03, 0x03), /* 22 */
+ SPD_VAL(0x3d, 0x3d), /* 23 */
+ SPD_VAL(0x45, 0x45), /* 24 */
+ SPD_VAL(0x50, 0x50), /* 25 */
+ SPD_VAL(0x45, 0x45), /* 26 */
+ SPD_VAL(0x3c, 0x3c), /* 27 */
+ SPD_VAL(0x28, 0x28), /* 28 */
+ SPD_VAL(0x3c, 0x3c), /* 29 */
+ SPD_VAL(0x2d, 0x2d), /* 30 */
+ SPD_VAL(0x20, 0x80), /* 31 */
+ SPD_VAL(0x20, 0x20), /* 32 */
+ SPD_VAL(0x27, 0x27), /* 33 */
+ SPD_VAL(0x10, 0x10), /* 34 */
+ SPD_VAL(0x17, 0x17), /* 35 */
+ SPD_VAL(0x3c, 0x3c), /* 36 */
+ SPD_VAL(0x1e, 0x1e), /* 37 */
+ SPD_VAL(0x1e, 0x1e), /* 38 */
+ SPD_VAL(0x00, 0x00), /* 39 */
+ SPD_VAL(0x00, 0x06), /* 40 */
+ SPD_VAL(0x37, 0x37), /* 41 */
+ SPD_VAL(0x4b, 0x7f), /* 42 */
+ SPD_VAL(0x80, 0x80), /* 43 */
+ SPD_VAL(0x18, 0x18), /* 44 */
+ SPD_VAL(0x22, 0x22), /* 45 */
+ SPD_VAL(0x00, 0x00), /* 46 */
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
+ SPD_VAL(0x10, 0x10), /* 62 */
+ SPD_VAL(0x7e, 0x1d), /* 63 */
+ { 'e', 's', 'd', '-', 'g', 'm', 'b', 'h' },
+ SPD_VAL(0x00, 0x00), /* 72 */
+#ifdef VME_CADDY2
+ { "vme-caddy/2 ram " }
+#else
+ { "vme-cpu/2 ram " }