- /* Enable clock */
- at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_EMAC);
-
- /*
- * Disable pull-up on:
- * RXDV (PA17) => PHY normal mode (not Test mode)
- * ERX0 (PA14) => PHY ADDR0
- * ERX1 (PA15) => PHY ADDR1
- * ERX2 (PA25) => PHY ADDR2
- * ERX3 (PA26) => PHY ADDR3
- * ECRS (PA28) => PHY ADDR4 => PHYADDR = 0x0
- *
- * PHY has internal pull-down
- */
- writel(pin_to_mask(AT91_PIN_PA14) |
- pin_to_mask(AT91_PIN_PA15) |
- pin_to_mask(AT91_PIN_PA17) |
- pin_to_mask(AT91_PIN_PA25) |
- pin_to_mask(AT91_PIN_PA26) |
- pin_to_mask(AT91_PIN_PA28),
- pin_to_controller(AT91_PIN_PA0) + PIO_PUDR);
-
- /* Need to reset PHY -> 500ms reset */
- at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
- (AT91_RSTC_ERSTL & (0x0D << 8)) |
- AT91_RSTC_URSTEN);
-
- at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST);
-
- /* Wait for end hardware reset */
- while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL));
-
- /* Restore NRST value */
- at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
- (AT91_RSTC_ERSTL & (0x0 << 8)) |
- AT91_RSTC_URSTEN);
-
- /* Re-enable pull-up */
- writel(pin_to_mask(AT91_PIN_PA14) |
- pin_to_mask(AT91_PIN_PA15) |
- pin_to_mask(AT91_PIN_PA17) |
- pin_to_mask(AT91_PIN_PA25) |
- pin_to_mask(AT91_PIN_PA26) |
- pin_to_mask(AT91_PIN_PA28),
- pin_to_controller(AT91_PIN_PA0) + PIO_PUER);
-
- at91_set_A_periph(AT91_PIN_PA19, 0); /* ETXCK_EREFCK */
- at91_set_A_periph(AT91_PIN_PA17, 0); /* ERXDV */
- at91_set_A_periph(AT91_PIN_PA14, 0); /* ERX0 */
- at91_set_A_periph(AT91_PIN_PA15, 0); /* ERX1 */
- at91_set_A_periph(AT91_PIN_PA18, 0); /* ERXER */
- at91_set_A_periph(AT91_PIN_PA16, 0); /* ETXEN */
- at91_set_A_periph(AT91_PIN_PA12, 0); /* ETX0 */
- at91_set_A_periph(AT91_PIN_PA13, 0); /* ETX1 */
- at91_set_A_periph(AT91_PIN_PA21, 0); /* EMDIO */
- at91_set_A_periph(AT91_PIN_PA20, 0); /* EMDC */
-
-#ifndef CONFIG_RMII
- at91_set_B_periph(AT91_PIN_PA28, 0); /* ECRS */
- at91_set_B_periph(AT91_PIN_PA29, 0); /* ECOL */
- at91_set_B_periph(AT91_PIN_PA25, 0); /* ERX2 */
- at91_set_B_periph(AT91_PIN_PA26, 0); /* ERX3 */
- at91_set_B_periph(AT91_PIN_PA27, 0); /* ERXCK */
- at91_set_B_periph(AT91_PIN_PA23, 0); /* ETX2 */
- at91_set_B_periph(AT91_PIN_PA24, 0); /* ETX3 */
- at91_set_B_periph(AT91_PIN_PA22, 0); /* ETXER */
-#endif
-