x86: Call lapic_setup() in interrupt_init()

[oweals/u-boot.git] / arch / x86 / Kconfig

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index f07567c81ac4374c46349cf892c5420179841369..65cbb9cc660da3a4c4b763a610beb8ddc7c3aa1f 100644 (file)
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -8,6 +8,9 @@ choice
        prompt "Mainboard vendor"
        default VENDOR_EMULATION
 
        prompt "Mainboard vendor"
        default VENDOR_EMULATION
 

+config VENDOR_CONGATEC
+       bool "congatec"
+

 config VENDOR_COREBOOT
        bool "coreboot"
 
 config VENDOR_COREBOOT
        bool "coreboot"
 


@@ -26,6 +29,7 @@ config VENDOR_INTEL
 endchoice
 
 # board-specific options below
 endchoice
 
 # board-specific options below

+source "board/congatec/Kconfig"

 source "board/coreboot/Kconfig"
 source "board/efi/Kconfig"
 source "board/emulation/Kconfig"
 source "board/coreboot/Kconfig"
 source "board/efi/Kconfig"
 source "board/emulation/Kconfig"


@@ -34,6 +38,7 @@ source "board/intel/Kconfig"
 
 # platform-specific options below
 source "arch/x86/cpu/baytrail/Kconfig"
 
 # platform-specific options below
 source "arch/x86/cpu/baytrail/Kconfig"

+source "arch/x86/cpu/broadwell/Kconfig"

 source "arch/x86/cpu/coreboot/Kconfig"
 source "arch/x86/cpu/ivybridge/Kconfig"
 source "arch/x86/cpu/qemu/Kconfig"
 source "arch/x86/cpu/coreboot/Kconfig"
 source "arch/x86/cpu/ivybridge/Kconfig"
 source "arch/x86/cpu/qemu/Kconfig"


@@ -42,6 +47,9 @@ source "arch/x86/cpu/queensbay/Kconfig"
 
 # architecture-specific options below
 
 
 # architecture-specific options below
 

+config AHCI
+       default y
+

 config SYS_MALLOC_F_LEN
        default 0x800
 
 config SYS_MALLOC_F_LEN
        default 0x800
 


@@ -93,9 +101,6 @@ config SYS_X86_START16
        depends on X86_RESET_VECTOR
        default 0xfffff800
 
        depends on X86_RESET_VECTOR
        default 0xfffff800
 

-config DM_PCI_COMPAT
-       default y       # Until we finish moving over to the new API
-

 config BOARD_ROMSIZE_KB_512
        bool
 config BOARD_ROMSIZE_KB_1024
 config BOARD_ROMSIZE_KB_512
        bool
 config BOARD_ROMSIZE_KB_1024


@@ -251,6 +256,16 @@ config FSP_USE_UPD
          are still some FSPs that might not even have UPD. For such FSPs,
          override this to n in their platform Kconfig files.
 
          are still some FSPs that might not even have UPD. For such FSPs,
          override this to n in their platform Kconfig files.
 

+config FSP_BROKEN_HOB
+       bool
+       depends on HAVE_FSP
+       help
+         Indicate some buggy FSPs that does not report memory used by FSP
+         itself as reserved in the resource descriptor HOB. Select this to
+         tell U-Boot to do some additional work to ensure U-Boot relocation
+         do not overwrite the important boot service data which is used by
+         FSP, otherwise the subsequent call to fsp_notify() will fail.
+

 config ENABLE_MRC_CACHE
        bool "Enable MRC cache"
        depends on !EFI && !SYS_COREBOOT
 config ENABLE_MRC_CACHE
        bool "Enable MRC cache"
        depends on !EFI && !SYS_COREBOOT


@@ -259,6 +274,85 @@ config ENABLE_MRC_CACHE
          to be used for speeding up boot time on future reboots and/or
          power cycles.
 
          to be used for speeding up boot time on future reboots and/or
          power cycles.
 

+         For platforms that use Intel FSP for the memory initialization,
+         please check FSP output HOB via U-Boot command 'fsp hob' to see
+         if there is FSP_NON_VOLATILE_STORAGE_HOB_GUID (asm/fsp/fsp_hob.h).
+         If such GUID does not exist, MRC cache is not avaiable on such
+         platform (eg: Intel Queensbay), which means selecting this option
+         here does not make any difference.
+
+config HAVE_MRC
+       bool "Add a System Agent binary"
+       depends on !HAVE_FSP
+       help
+         Select this option to add a System Agent binary to
+         the resulting U-Boot image. MRC stands for Memory Reference Code.
+         It is a binary blob which U-Boot uses to set up SDRAM.
+
+         Note: Without this binary U-Boot will not be able to set up its
+         SDRAM so will not boot.
+
+config CACHE_MRC_BIN
+       bool
+       depends on HAVE_MRC
+       default n
+       help
+         Enable caching for the memory reference code binary. This uses an
+         MTRR (memory type range register) to turn on caching for the section
+         of SPI flash that contains the memory reference code. This makes
+         SDRAM init run faster.
+
+config CACHE_MRC_SIZE_KB
+       int
+       depends on HAVE_MRC
+       default 512
+       help
+         Sets the size of the cached area for the memory reference code.
+         This ends at the end of SPI flash (address 0xffffffff) and is
+         measured in KB. Typically this is set to 512, providing for 0.5MB
+         of cached space.
+
+config DCACHE_RAM_BASE
+       hex
+       depends on HAVE_MRC
+       help
+         Sets the base of the data cache area in memory space. This is the
+         start address of the cache-as-RAM (CAR) area and the address varies
+         depending on the CPU. Once CAR is set up, read/write memory becomes
+         available at this address and can be used temporarily until SDRAM
+         is working.
+
+config DCACHE_RAM_SIZE
+       hex
+       depends on HAVE_MRC
+       default 0x40000
+       help
+         Sets the total size of the data cache area in memory space. This
+         sets the size of the cache-as-RAM (CAR) area. Note that much of the
+         CAR space is required by the MRC. The CAR space available to U-Boot
+         is normally at the start and typically extends to 1/4 or 1/2 of the
+         available size.
+
+config DCACHE_RAM_MRC_VAR_SIZE
+       hex
+       depends on HAVE_MRC
+       help
+         This is the amount of CAR (Cache as RAM) reserved for use by the
+         memory reference code. This depends on the implementation of the
+         memory reference code and must be set correctly or the board will
+         not boot.
+
+config HAVE_REFCODE
+        bool "Add a Reference Code binary"
+        help
+          Select this option to add a Reference Code binary to the resulting
+          U-Boot image. This is an Intel binary blob that handles system
+          initialisation, in this case the PCH and System Agent.
+
+          Note: Without this binary (on platforms that need it such as
+          broadwell) U-Boot will be missing some critical setup steps.
+          Various peripherals may fail to work.
+

 config SMP
        bool "Enable Symmetric Multiprocessing"
        default n
 config SMP
        bool "Enable Symmetric Multiprocessing"
        default n


@@ -352,6 +446,7 @@ config GENERATE_MP_TABLE
 config GENERATE_ACPI_TABLE
        bool "Generate an ACPI (Advanced Configuration and Power Interface) table"
        default n
 config GENERATE_ACPI_TABLE
        bool "Generate an ACPI (Advanced Configuration and Power Interface) table"
        default n

+       select QFW if QEMU

        help
          The Advanced Configuration and Power Interface (ACPI) specification
          provides an open standard for device configuration and management
        help
          The Advanced Configuration and Power Interface (ACPI) specification
          provides an open standard for device configuration and management


@@ -433,6 +528,30 @@ config I8042_KEYB
 config DM_KEYBOARD
        default y
 
 config DM_KEYBOARD
        default y
 

+config SEABIOS
+       bool "Support booting SeaBIOS"
+       help
+         SeaBIOS is an open source implementation of a 16-bit X86 BIOS.
+         It can run in an emulator or natively on X86 hardware with the use
+         of coreboot/U-Boot. By turning on this option, U-Boot prepares
+         all the configuration tables that are necessary to boot SeaBIOS.
+
+         Check http://www.seabios.org/SeaBIOS for details.
+
+config HIGH_TABLE_SIZE
+       hex "Size of configuration tables which reside in high memory"
+       default 0x10000
+       depends on SEABIOS
+       help
+         SeaBIOS itself resides in E seg and F seg, where U-Boot puts all
+         configuration tables like PIRQ/MP/ACPI. To avoid conflicts, U-Boot
+         puts a copy of configuration tables in high memory region which
+         is reserved on the stack before relocation. The region size is
+         determined by this option.
+
+         Increse it if the default size does not fit the board's needs.
+         This is most likely due to a large ACPI DSDT table is used.
+

 source "arch/x86/lib/efi/Kconfig"
 
 endmenu
 source "arch/x86/lib/efi/Kconfig"
 
 endmenu