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mpc8xx: remove lwmon board support
[oweals/u-boot.git]
/
arch
/
powerpc
/
include
/
asm
/
processor.h
diff --git
a/arch/powerpc/include/asm/processor.h
b/arch/powerpc/include/asm/processor.h
index 64a6f9c54e10e910e75c776731a4a9b6f33c1d1b..2ed51b12486b62f3cbe535eb386a3396328d5ee1 100644
(file)
--- a/
arch/powerpc/include/asm/processor.h
+++ b/
arch/powerpc/include/asm/processor.h
@@
-7,8
+7,6
@@
*/
#define current_text_addr() ({ __label__ _l; _l: &&_l;})
*/
#define current_text_addr() ({ __label__ _l; _l: &&_l;})
-#include <linux/config.h>
-
#include <asm/ptrace.h>
#include <asm/types.h>
#include <asm/ptrace.h>
#include <asm/types.h>
@@
-380,11
+378,16
@@
#else
#define SPRN_TCR 0x154 /* Book E Timer Control Register */
#endif /* CONFIG_BOOKE */
#else
#define SPRN_TCR 0x154 /* Book E Timer Control Register */
#endif /* CONFIG_BOOKE */
+#ifdef CONFIG_E500MC
+#define TCR_WP(x) (((64-x)&0x3)<<30)| \
+ (((64-x)&0x3c)<<15) /* WDT Period 2^x clocks*/
+#else
#define TCR_WP(x) (((x)&0x3)<<30) /* WDT Period */
#define WP_2_17 0 /* 2^17 clocks */
#define WP_2_21 1 /* 2^21 clocks */
#define WP_2_25 2 /* 2^25 clocks */
#define WP_2_29 3 /* 2^29 clocks */
#define TCR_WP(x) (((x)&0x3)<<30) /* WDT Period */
#define WP_2_17 0 /* 2^17 clocks */
#define WP_2_21 1 /* 2^21 clocks */
#define WP_2_25 2 /* 2^25 clocks */
#define WP_2_29 3 /* 2^29 clocks */
+#endif /* CONFIG_E500 */
#define TCR_WRC(x) (((x)&0x3)<<28) /* WDT Reset Control */
#define WRC_NONE 0 /* No reset will occur */
#define WRC_CORE 1 /* Core reset will occur */
#define TCR_WRC(x) (((x)&0x3)<<28) /* WDT Reset Control */
#define WRC_NONE 0 /* No reset will occur */
#define WRC_CORE 1 /* Core reset will occur */
@@
-847,7
+850,7
@@
/* System-On-Chip Version Register (SVR) field extraction */
#define SVR_VER(svr) (((svr) >> 16) & 0xFFFF) /* Version field */
/* System-On-Chip Version Register (SVR) field extraction */
#define SVR_VER(svr) (((svr) >> 16) & 0xFFFF) /* Version field */
-#define SVR_REV(svr) (((svr) >> 0) & 0xFF
FF)
/* Revision field */
+#define SVR_REV(svr) (((svr) >> 0) & 0xFF
)
/* Revision field */
#define SVR_CID(svr) (((svr) >> 28) & 0x0F) /* Company or manufacturer ID */
#define SVR_SOCOP(svr) (((svr) >> 22) & 0x3F) /* SOC integration options */
#define SVR_CID(svr) (((svr) >> 28) & 0x0F) /* Company or manufacturer ID */
#define SVR_SOCOP(svr) (((svr) >> 22) & 0x3F) /* SOC integration options */
@@
-894,9
+897,6
@@
#define PVR_405GP_RC 0x40110082
#define PVR_405GP_RD 0x401100C4
#define PVR_405GP_RE 0x40110145 /* same as pc405cr rev c */
#define PVR_405GP_RC 0x40110082
#define PVR_405GP_RD 0x401100C4
#define PVR_405GP_RE 0x40110145 /* same as pc405cr rev c */
-#define PVR_405CR_RA 0x40110041
-#define PVR_405CR_RB 0x401100C5
-#define PVR_405CR_RC 0x40110145 /* same as pc405gp rev e */
#define PVR_405EP_RA 0x51210950
#define PVR_405GPR_RB 0x50910951
#define PVR_405EZ_RA 0x41511460
#define PVR_405EP_RA 0x51210950
#define PVR_405GPR_RB 0x50910951
#define PVR_405EZ_RA 0x41511460
@@
-1043,9
+1043,6
@@
/* System Version Register (SVR) field extraction */
/* System Version Register (SVR) field extraction */
-#define SVR_VER(svr) (((svr) >> 16) & 0xFFFF) /* Version field */
-#define SVR_REV(svr) (((svr) >> 0) & 0xFFFF) /* Revison field */
-
#define SVR_SUBVER(svr) (((svr) >> 8) & 0xFF) /* Process/MFG sub-version */
#define SVR_FAM(svr) (((svr) >> 20) & 0xFFF) /* Family field */
#define SVR_SUBVER(svr) (((svr) >> 8) & 0xFF) /* Process/MFG sub-version */
#define SVR_FAM(svr) (((svr) >> 20) & 0xFFF) /* Family field */
@@
-1119,12
+1116,13
@@
#define SVR_T4240 0x824000
#define SVR_T4120 0x824001
#define SVR_T4160 0x824100
#define SVR_T4240 0x824000
#define SVR_T4120 0x824001
#define SVR_T4160 0x824100
+#define SVR_T4080 0x824102
#define SVR_C291 0x850000
#define SVR_C292 0x850020
#define SVR_C293 0x850030
#define SVR_B4860 0X868000
#define SVR_G4860 0x868001
#define SVR_C291 0x850000
#define SVR_C292 0x850020
#define SVR_C293 0x850030
#define SVR_B4860 0X868000
#define SVR_G4860 0x868001
-#define SVR_
G40
60 0x868003
+#define SVR_
B44
60 0x868003
#define SVR_B4440 0x868100
#define SVR_G4440 0x868101
#define SVR_B4420 0x868102
#define SVR_B4440 0x868100
#define SVR_G4440 0x868101
#define SVR_B4420 0x868102
@@
-1135,6
+1133,12
@@
#define SVR_T1020 0x852100
#define SVR_T1021 0x852101
#define SVR_T1022 0x852102
#define SVR_T1020 0x852100
#define SVR_T1021 0x852101
#define SVR_T1022 0x852102
+#define SVR_T1024 0x854000
+#define SVR_T1023 0x854100
+#define SVR_T1014 0x854400
+#define SVR_T1013 0x854500
+#define SVR_T2080 0x853000
+#define SVR_T2081 0x853100
#define SVR_8610 0x80A000
#define SVR_8641 0x809000
#define SVR_8610 0x80A000
#define SVR_8641 0x809000
@@
-1350,26
+1354,14
@@
void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val);
#if defined(CONFIG_8xx)
#define _machine _MACH_8xx
#define have_of 0
#if defined(CONFIG_8xx)
#define _machine _MACH_8xx
#define have_of 0
-#elif defined(CONFIG_OAK)
-#define _machine _MACH_oak
-#define have_of 0
#elif defined(CONFIG_WALNUT)
#define _machine _MACH_walnut
#define have_of 0
#elif defined(CONFIG_WALNUT)
#define _machine _MACH_walnut
#define have_of 0
-#elif defined(CONFIG_APUS)
-#define _machine _MACH_apus
-#define have_of 0
-#elif defined(CONFIG_GEMINI)
-#define _machine _MACH_gemini
-#define have_of 0
-#elif defined(CONFIG_8260)
+#elif defined(CONFIG_MPC8260)
#define _machine _MACH_8260
#define have_of 0
#elif defined(CONFIG_SANDPOINT)
#define _machine _MACH_sandpoint
#define _machine _MACH_8260
#define have_of 0
#elif defined(CONFIG_SANDPOINT)
#define _machine _MACH_sandpoint
-#elif defined(CONFIG_HIDDEN_DRAGON)
-#define _machine _MACH_hidden_dragon
-#define have_of 0
#else
#error "Machine not defined correctly"
#endif
#else
#error "Machine not defined correctly"
#endif