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ti: dwc3: Enable clocks in enable_basic_clocks() in hw_data.c
[oweals/u-boot.git]
/
arch
/
blackfin
/
cpu
/
initcode.h
diff --git
a/arch/blackfin/cpu/initcode.h
b/arch/blackfin/cpu/initcode.h
index 1fec7f3d855254a78b4d04579e03651e597b78da..ab7fa45075b24d27dc4b288d9b979da1d9b5b8f6 100644
(file)
--- a/
arch/blackfin/cpu/initcode.h
+++ b/
arch/blackfin/cpu/initcode.h
@@
-49,7
+49,7
@@
program_async_controller(ADI_BOOT_DATA *bs)
serial_putc('a');
serial_putc('a');
-#ifdef __ADSPBF60x__
+#if
n
def __ADSPBF60x__
/* Program the async banks controller. */
#ifdef EBIU_AMGCTL
bfin_write_EBIU_AMBCTL0(CONFIG_EBIU_AMBCTL0_VAL);
/* Program the async banks controller. */
#ifdef EBIU_AMGCTL
bfin_write_EBIU_AMBCTL0(CONFIG_EBIU_AMBCTL0_VAL);
@@
-74,7
+74,7
@@
program_async_controller(ADI_BOOT_DATA *bs)
serial_putc('c');
serial_putc('c');
-#else
/* __ADSPBF60x__ */
+#else /* __ADSPBF60x__ */
/* Program the static memory controller. */
# ifdef CONFIG_SMC_GCTL_VAL
bfin_write_SMC_GCTL(CONFIG_SMC_GCTL_VAL);
/* Program the static memory controller. */
# ifdef CONFIG_SMC_GCTL_VAL
bfin_write_SMC_GCTL(CONFIG_SMC_GCTL_VAL);
@@
-116,7
+116,7
@@
program_async_controller(ADI_BOOT_DATA *bs)
bfin_write_SMC_B3ETIM(CONFIG_SMC_B3ETIM_VAL);
# endif
bfin_write_SMC_B3ETIM(CONFIG_SMC_B3ETIM_VAL);
# endif
-#endif
+#endif
/* __ADSPBF60x__ */
serial_putc('d');
}
serial_putc('d');
}