+
+static int __maybe_unused cpu_desc_id(void)
+{
+ u32 idcode;
+ u8 i;
+
+ idcode = zynq_slcr_get_idcode();
+ for (i = 0; zynq_fpga_descs[i].idcode; i++) {
+ if (zynq_fpga_descs[i].idcode == idcode)
+ return i;
+ }
+
+ return -ENODEV;
+}
+
+#if defined(CONFIG_ARCH_EARLY_INIT_R)
+int arch_early_init_r(void)
+{
+#if (defined(CONFIG_FPGA) && !defined(CONFIG_SPL_BUILD)) || \
+ (defined(CONFIG_SPL_FPGA_SUPPORT) && defined(CONFIG_SPL_BUILD))
+ int cpu_id = cpu_desc_id();
+
+ if (cpu_id < 0)
+ return 0;
+
+ fpga.size = zynq_fpga_descs[cpu_id].fpga_size;
+ fpga.name = zynq_fpga_descs[cpu_id].devicename;
+ fpga_init();
+ fpga_add(fpga_xilinx, &fpga);
+#endif
+ return 0;
+}
+#endif
+
+#ifdef CONFIG_DISPLAY_CPUINFO
+int print_cpuinfo(void)
+{
+ u32 version;
+ int cpu_id = cpu_desc_id();
+
+ if (cpu_id < 0)
+ return 0;
+
+ version = zynq_get_silicon_version() << 1;
+ if (version > (PCW_SILICON_VERSION_3 << 1))
+ version += 1;
+
+ printf("CPU: Zynq %s\n", zynq_fpga_descs[cpu_id].devicename);
+ printf("Silicon: v%d.%d\n", version >> 1, version & 1);
+ return 0;
+}
+#endif