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ARM: uniphier: enable SSC for more PLLs for LD20 SoC
[oweals/u-boot.git]
/
arch
/
arm
/
mach-uniphier
/
soc_info.c
diff --git
a/arch/arm/mach-uniphier/soc_info.c
b/arch/arm/mach-uniphier/soc_info.c
index 6cdeae65784754f60a2e693624820096e3a3b8d4..046104bd78d66a6426cdb279984dbe15b6c0fd32 100644
(file)
--- a/
arch/arm/mach-uniphier/soc_info.c
+++ b/
arch/arm/mach-uniphier/soc_info.c
@@
-6,8
+6,9
@@
#include <linux/io.h>
#include <linux/types.h>
#include <linux/io.h>
#include <linux/types.h>
-#include <mach/sg-regs.h>
-#include <mach/soc_info.h>
+
+#include "sg-regs.h"
+#include "soc-info.h"
#if UNIPHIER_MULTI_SOC
enum uniphier_soc_id uniphier_get_soc_type(void)
#if UNIPHIER_MULTI_SOC
enum uniphier_soc_id uniphier_get_soc_type(void)
@@
-16,49
+17,49
@@
enum uniphier_soc_id uniphier_get_soc_type(void)
enum uniphier_soc_id ret;
switch ((revision & SG_REVISION_TYPE_MASK) >> SG_REVISION_TYPE_SHIFT) {
enum uniphier_soc_id ret;
switch ((revision & SG_REVISION_TYPE_MASK) >> SG_REVISION_TYPE_SHIFT) {
-#ifdef CONFIG_ARCH_UNIPHIER_
PH1_
SLD3
+#ifdef CONFIG_ARCH_UNIPHIER_SLD3
case 0x25:
case 0x25:
- ret = SOC_UNIPHIER_
PH1_
SLD3;
+ ret = SOC_UNIPHIER_SLD3;
break;
#endif
break;
#endif
-#ifdef CONFIG_ARCH_UNIPHIER_
PH1_
LD4
+#ifdef CONFIG_ARCH_UNIPHIER_LD4
case 0x26:
case 0x26:
- ret = SOC_UNIPHIER_
PH1_
LD4;
+ ret = SOC_UNIPHIER_LD4;
break;
#endif
break;
#endif
-#ifdef CONFIG_ARCH_UNIPHIER_P
H1_P
RO4
+#ifdef CONFIG_ARCH_UNIPHIER_PRO4
case 0x28:
case 0x28:
- ret = SOC_UNIPHIER_P
H1_P
RO4;
+ ret = SOC_UNIPHIER_PRO4;
break;
#endif
break;
#endif
-#ifdef CONFIG_ARCH_UNIPHIER_
PH1_
SLD8
+#ifdef CONFIG_ARCH_UNIPHIER_SLD8
case 0x29:
case 0x29:
- ret = SOC_UNIPHIER_
PH1_
SLD8;
+ ret = SOC_UNIPHIER_SLD8;
break;
#endif
break;
#endif
-#ifdef CONFIG_ARCH_UNIPHIER_P
H1_P
RO5
+#ifdef CONFIG_ARCH_UNIPHIER_PRO5
case 0x2A:
case 0x2A:
- ret = SOC_UNIPHIER_P
H1_P
RO5;
+ ret = SOC_UNIPHIER_PRO5;
break;
#endif
break;
#endif
-#ifdef CONFIG_ARCH_UNIPHIER_P
ROXSTREAM
2
+#ifdef CONFIG_ARCH_UNIPHIER_P
XS
2
case 0x2E:
case 0x2E:
- ret = SOC_UNIPHIER_P
ROXSTREAM
2;
+ ret = SOC_UNIPHIER_P
XS
2;
break;
#endif
break;
#endif
-#ifdef CONFIG_ARCH_UNIPHIER_
PH1_
LD6B
+#ifdef CONFIG_ARCH_UNIPHIER_LD6B
case 0x2F:
case 0x2F:
- ret = SOC_UNIPHIER_
PH1_
LD6B;
+ ret = SOC_UNIPHIER_LD6B;
break;
#endif
break;
#endif
-#ifdef CONFIG_ARCH_UNIPHIER_
PH1_S
LD11
+#ifdef CONFIG_ARCH_UNIPHIER_LD11
case 0x31:
case 0x31:
- ret = SOC_UNIPHIER_
PH1_S
LD11;
+ ret = SOC_UNIPHIER_LD11;
break;
#endif
break;
#endif
-#ifdef CONFIG_ARCH_UNIPHIER_
PH1_LD1
0
+#ifdef CONFIG_ARCH_UNIPHIER_
LD2
0
case 0x32:
case 0x32:
- ret = SOC_UNIPHIER_
PH1_LD1
0;
+ ret = SOC_UNIPHIER_
LD2
0;
break;
#endif
default:
break;
#endif
default: