+static int uniphier_ld4_dram_map_get(struct uniphier_dram_map dram_map[])
+{
+ return uniphier_memconf_decode(dram_map, 0xc0000000, false);
+}
+
+static int uniphier_pro4_dram_map_get(struct uniphier_dram_map dram_map[])
+{
+ return uniphier_memconf_decode(dram_map, 0xa0000000, false);
+}
+
+static int uniphier_pxs2_dram_map_get(struct uniphier_dram_map dram_map[])
+{
+ return uniphier_memconf_decode(dram_map, 0xc0000000, true);
+}
+
+struct uniphier_dram_init_data {
+ unsigned int soc_id;
+ int (*dram_map_get)(struct uniphier_dram_map dram_map[]);
+};
+
+static const struct uniphier_dram_init_data uniphier_dram_init_data[] = {
+ {
+ .soc_id = UNIPHIER_LD4_ID,
+ .dram_map_get = uniphier_ld4_dram_map_get,
+ },
+ {
+ .soc_id = UNIPHIER_PRO4_ID,
+ .dram_map_get = uniphier_pro4_dram_map_get,
+ },
+ {
+ .soc_id = UNIPHIER_SLD8_ID,
+ .dram_map_get = uniphier_ld4_dram_map_get,
+ },
+ {
+ .soc_id = UNIPHIER_PRO5_ID,
+ .dram_map_get = uniphier_ld4_dram_map_get,
+ },
+ {
+ .soc_id = UNIPHIER_PXS2_ID,
+ .dram_map_get = uniphier_pxs2_dram_map_get,
+ },
+ {
+ .soc_id = UNIPHIER_LD6B_ID,
+ .dram_map_get = uniphier_pxs2_dram_map_get,
+ },
+ {
+ .soc_id = UNIPHIER_LD11_ID,
+ .dram_map_get = uniphier_ld4_dram_map_get,
+ },
+ {
+ .soc_id = UNIPHIER_LD20_ID,
+ .dram_map_get = uniphier_pxs2_dram_map_get,
+ },
+ {
+ .soc_id = UNIPHIER_PXS3_ID,
+ .dram_map_get = uniphier_pxs2_dram_map_get,
+ },
+};
+UNIPHIER_DEFINE_SOCDATA_FUNC(uniphier_get_dram_init_data,
+ uniphier_dram_init_data)
+
+static int uniphier_dram_map_get(struct uniphier_dram_map *dram_map)
+{
+ const struct uniphier_dram_init_data *data;
+
+ data = uniphier_get_dram_init_data();
+ if (!data) {
+ pr_err("unsupported SoC\n");
+ return -ENOTSUPP;
+ }
+
+ return data->dram_map_get(dram_map);
+}
+