- u32 cpu_type = rmobile_get_cpu_type();
-
- switch (cpu_type) {
- case RMOBILE_CPU_TYPE_R8A7795:
- mem_map = r8a7795_mem_map;
- break;
- case RMOBILE_CPU_TYPE_R8A7796:
- case RMOBILE_CPU_TYPE_R8A77965:
- mem_map = r8a7796_mem_map;
- break;
- case RMOBILE_CPU_TYPE_R8A77970:
- mem_map = r8a77970_mem_map;
- break;
- case RMOBILE_CPU_TYPE_R8A77995:
- mem_map = r8a77995_mem_map;
- break;
+ u64 start, size;
+ int bank, i = 0;
+
+ /* Create map for RPC access */
+ gen3_mem_map[i].virt = 0x0ULL;
+ gen3_mem_map[i].phys = 0x0ULL;
+ gen3_mem_map[i].size = 0x40000000ULL;
+ gen3_mem_map[i].attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN;
+ i++;
+
+ /* Generate entires for DRAM in 32bit address space */
+ for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
+ start = gd->bd->bi_dram[bank].start;
+ size = gd->bd->bi_dram[bank].size;
+
+ /* Skip empty DRAM banks */
+ if (!size)
+ continue;
+
+ /* Skip DRAM above 4 GiB */
+ if (start >> 32ULL)
+ continue;
+
+ /* Mark memory reserved by ATF as cacheable too. */
+ if (start == 0x48000000) {
+ start = 0x40000000ULL;
+ size += 0x08000000ULL;
+ }
+
+ gen3_mem_map[i].virt = start;
+ gen3_mem_map[i].phys = start;
+ gen3_mem_map[i].size = size;
+ gen3_mem_map[i].attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+ PTE_BLOCK_INNER_SHARE;
+ i++;
+ }
+
+ /* Create map for register access */
+ gen3_mem_map[i].virt = 0xc0000000ULL;
+ gen3_mem_map[i].phys = 0xc0000000ULL;
+ gen3_mem_map[i].size = 0x40000000ULL;
+ gen3_mem_map[i].attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN;
+ i++;
+
+ /* Generate entires for DRAM in 64bit address space */
+ for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
+ start = gd->bd->bi_dram[bank].start;
+ size = gd->bd->bi_dram[bank].size;
+
+ /* Skip empty DRAM banks */
+ if (!size)
+ continue;
+
+ /* Skip DRAM below 4 GiB */
+ if (!(start >> 32ULL))
+ continue;
+
+ gen3_mem_map[i].virt = start;
+ gen3_mem_map[i].phys = start;
+ gen3_mem_map[i].size = size;
+ gen3_mem_map[i].attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+ PTE_BLOCK_INNER_SHARE;
+ i++;