projects
/
oweals
/
u-boot.git
/ blobdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
|
commitdiff
|
tree
raw
|
inline
| side by side
Merge branch 'master' of git://git.denx.de/u-boot-nand-flash
[oweals/u-boot.git]
/
arch
/
arm
/
lib
/
cache-cp15.c
diff --git
a/arch/arm/lib/cache-cp15.c
b/arch/arm/lib/cache-cp15.c
index 1cab27c22629fe5bd034d8278efa8d09e36f7378..4abe1cf061a879d65170ad8c6697d9c9e1954751 100644
(file)
--- a/
arch/arm/lib/cache-cp15.c
+++ b/
arch/arm/lib/cache-cp15.c
@@
-23,6
+23,8
@@
#include <common.h>
#include <asm/system.h>
#include <common.h>
#include <asm/system.h>
+#include <asm/cache.h>
+#include <linux/compiler.h>
#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
@@
-34,6
+36,10
@@
void __arm_init_before_mmu(void)
void arm_init_before_mmu(void)
__attribute__((weak, alias("__arm_init_before_mmu")));
void arm_init_before_mmu(void)
__attribute__((weak, alias("__arm_init_before_mmu")));
+__weak void arm_init_domains(void)
+{
+}
+
static void cp_delay (void)
{
volatile int i;
static void cp_delay (void)
{
volatile int i;
@@
-46,7
+52,7
@@
static void cp_delay (void)
void set_section_dcache(int section, enum dcache_option option)
{
void set_section_dcache(int section, enum dcache_option option)
{
- u32 *page_table = (u32 *)gd->tlb_addr;
+ u32 *page_table = (u32 *)gd->
arch.
tlb_addr;
u32 value;
value = (section << MMU_SECTION_SHIFT) | (3 << 10);
u32 value;
value = (section << MMU_SECTION_SHIFT) | (3 << 10);
@@
-65,7
+71,7
@@
void mmu_page_table_flush(unsigned long start, unsigned long stop)
void mmu_set_region_dcache_behaviour(u32 start, int size,
enum dcache_option option)
{
void mmu_set_region_dcache_behaviour(u32 start, int size,
enum dcache_option option)
{
- u32 *page_table = (u32 *)gd->tlb_addr;
+ u32 *page_table = (u32 *)gd->
arch.
tlb_addr;
u32 upto, end;
end = ALIGN(start + size, MMU_SECTION_SIZE) >> MMU_SECTION_SHIFT;
u32 upto, end;
end = ALIGN(start + size, MMU_SECTION_SIZE) >> MMU_SECTION_SHIFT;
@@
-77,7
+83,7
@@
void mmu_set_region_dcache_behaviour(u32 start, int size,
mmu_page_table_flush((u32)&page_table[start], (u32)&page_table[end]);
}
mmu_page_table_flush((u32)&page_table[start], (u32)&page_table[end]);
}
-
static inline
void dram_bank_mmu_setup(int bank)
+
__weak
void dram_bank_mmu_setup(int bank)
{
bd_t *bd = gd->bd;
int i;
{
bd_t *bd = gd->bd;
int i;
@@
-111,10
+117,13
@@
static inline void mmu_setup(void)
/* Copy the page table address to cp15 */
asm volatile("mcr p15, 0, %0, c2, c0, 0"
/* Copy the page table address to cp15 */
asm volatile("mcr p15, 0, %0, c2, c0, 0"
- : : "r" (gd->tlb_addr) : "memory");
+ : : "r" (gd->
arch.
tlb_addr) : "memory");
/* Set the access control to all-supervisor */
asm volatile("mcr p15, 0, %0, c3, c0, 0"
: : "r" (~0));
/* Set the access control to all-supervisor */
asm volatile("mcr p15, 0, %0, c3, c0, 0"
: : "r" (~0));
+
+ arm_init_domains();
+
/* and enable the mmu */
reg = get_cr(); /* get control reg. */
cp_delay();
/* and enable the mmu */
reg = get_cr(); /* get control reg. */
cp_delay();