-#define __raw_readb(a) __arch_getb(a)
-#define __raw_readw(a) __arch_getw(a)
-#define __raw_readl(a) __arch_getl(a)
+extern inline void __raw_readsw(unsigned long addr, void *data, int wordlen)
+{
+ uint16_t *buf = (uint16_t *)data;
+ while(wordlen--)
+ *buf++ = __arch_getw(addr);
+}
+
+extern inline void __raw_readsl(unsigned long addr, void *data, int longlen)
+{
+ uint32_t *buf = (uint32_t *)data;
+ while(longlen--)
+ *buf++ = __arch_getl(addr);
+}
+
+#define __raw_writeb(v,a) __arch_putb(v,a)
+#define __raw_writew(v,a) __arch_putw(v,a)
+#define __raw_writel(v,a) __arch_putl(v,a)
+
+#define __raw_readb(a) __arch_getb(a)
+#define __raw_readw(a) __arch_getw(a)
+#define __raw_readl(a) __arch_getl(a)
+
+/*
+ * TODO: The kernel offers some more advanced versions of barriers, it might
+ * have some advantages to use them instead of the simple one here.
+ */
+#define dmb() __asm__ __volatile__ ("" : : : "memory")
+#define __iormb() dmb()
+#define __iowmb() dmb()