+#else
+#define CONFIG_EXTRA_ENV \
+ "setenv fdt_high 0xffffffff;" \
+ "setenv initrd_high 0xffffffff;" \
+ "setenv hwconfig \'fsl_ddr:ctlr_intlv=null,bank_intlv=null\';"
+#endif
+
+/* Copying Bootscript and Header to DDR from NOR for LS2 and for rest, from
+ * Non-XIP Memory (Nand/SD)*/
+#if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_FSL_LSCH3) || \
+ defined(CONFIG_SD_BOOT) || defined(CONFIG_NAND_BOOT)
+#define CONFIG_BOOTSCRIPT_COPY_RAM
+#endif
+/* The address needs to be modified according to NOR, NAND, SD and
+ * DDR memory map
+ */
+#ifdef CONFIG_FSL_LSCH3
+#ifdef CONFIG_QSPI_BOOT
+#define CONFIG_BS_ADDR_DEVICE 0x20600000
+#define CONFIG_BS_HDR_ADDR_DEVICE 0x20640000
+#else /* NOR BOOT */
+#define CONFIG_BS_ADDR_DEVICE 0x580600000
+#define CONFIG_BS_HDR_ADDR_DEVICE 0x580640000
+#endif /*ifdef CONFIG_QSPI_BOOT */
+#define CONFIG_BS_SIZE 0x00001000
+#define CONFIG_BS_HDR_SIZE 0x00004000
+#define CONFIG_BS_ADDR_RAM 0xa0600000
+#define CONFIG_BS_HDR_ADDR_RAM 0xa0640000
+#else
+#ifdef CONFIG_SD_BOOT
+/* For SD boot address and size are assigned in terms of sector
+ * offset and no. of sectors respectively.
+ */
+#define CONFIG_BS_ADDR_DEVICE 0x00003000
+#define CONFIG_BS_HDR_ADDR_DEVICE 0x00003200
+#define CONFIG_BS_SIZE 0x00000008
+#define CONFIG_BS_HDR_SIZE 0x00000010
+#elif defined(CONFIG_NAND_BOOT)
+#define CONFIG_BS_ADDR_DEVICE 0x00600000
+#define CONFIG_BS_HDR_ADDR_DEVICE 0x00640000
+#define CONFIG_BS_SIZE 0x00001000
+#define CONFIG_BS_HDR_SIZE 0x00002000
+#elif defined(CONFIG_QSPI_BOOT)
+#define CONFIG_BS_ADDR_DEVICE 0x40600000
+#define CONFIG_BS_HDR_ADDR_DEVICE 0x40640000
+#define CONFIG_BS_SIZE 0x00001000
+#define CONFIG_BS_HDR_SIZE 0x00002000
+#else /* Default NOR Boot */
+#define CONFIG_BS_ADDR_DEVICE 0x60600000
+#define CONFIG_BS_HDR_ADDR_DEVICE 0x60640000
+#define CONFIG_BS_SIZE 0x00001000
+#define CONFIG_BS_HDR_SIZE 0x00002000
+#endif
+#define CONFIG_BS_ADDR_RAM 0x81000000
+#define CONFIG_BS_HDR_ADDR_RAM 0x81020000
+#endif