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ARM: tegra: allow pinmux mux option not to be set by init tables
[oweals/u-boot.git]
/
arch
/
arm
/
include
/
asm
/
cache.h
diff --git
a/arch/arm/include/asm/cache.h
b/arch/arm/include/asm/cache.h
index 6d60a4a6d955d276d12a492bdcf59342882a7dc0..ddebbc8fcdc40c937d43b8cf08f67959b7613384 100644
(file)
--- a/
arch/arm/include/asm/cache.h
+++ b/
arch/arm/include/asm/cache.h
@@
-11,6
+11,8
@@
#include <asm/system.h>
#include <asm/system.h>
+#ifndef CONFIG_ARM64
+
/*
* Invalidate L2 Cache using co-proc instruction
*/
/*
* Invalidate L2 Cache using co-proc instruction
*/
@@
-28,6
+30,9
@@
void l2_cache_disable(void);
void set_section_dcache(int section, enum dcache_option option);
void dram_bank_mmu_setup(int bank);
void set_section_dcache(int section, enum dcache_option option);
void dram_bank_mmu_setup(int bank);
+
+#endif
+
/*
* The current upper bound for ARM L1 data cache line sizes is 64 bytes. We
* use that value for aligning DMA buffers unless the board config has specified
/*
* The current upper bound for ARM L1 data cache line sizes is 64 bytes. We
* use that value for aligning DMA buffers unless the board config has specified