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sunxi: Fix CPUCFG address for R40
[oweals/u-boot.git]
/
arch
/
arm
/
include
/
asm
/
arch-sunxi
/
watchdog.h
diff --git
a/arch/arm/include/asm/arch-sunxi/watchdog.h
b/arch/arm/include/asm/arch-sunxi/watchdog.h
index 5b755e37f09b1c5548ea085d36a10bdfb335d3c4..ce6d6648560980a1d30bacbd23a4440888974c74 100644
(file)
--- a/
arch/arm/include/asm/arch-sunxi/watchdog.h
+++ b/
arch/arm/include/asm/arch-sunxi/watchdog.h
@@
-12,6
+12,12
@@
#define WDT_CTRL_RESTART (0x1 << 0)
#define WDT_CTRL_KEY (0x0a57 << 1)
#define WDT_CTRL_RESTART (0x1 << 0)
#define WDT_CTRL_KEY (0x0a57 << 1)
+
+#if defined(CONFIG_MACH_SUN4I) || \
+ defined(CONFIG_MACH_SUN5I) || \
+ defined(CONFIG_MACH_SUN7I) || \
+ defined(CONFIG_MACH_SUN8I_R40)
+
#define WDT_MODE_EN (0x1 << 0)
#define WDT_MODE_RESET_EN (0x1 << 1)
#define WDT_MODE_EN (0x1 << 0)
#define WDT_MODE_RESET_EN (0x1 << 1)
@@
-21,4
+27,21
@@
struct sunxi_wdog {
u32 res[2];
};
u32 res[2];
};
+#else
+
+#define WDT_CFG_RESET (0x1)
+#define WDT_MODE_EN (0x1)
+
+struct sunxi_wdog {
+ u32 irq_en; /* 0x00 */
+ u32 irq_sta; /* 0x04 */
+ u32 res1[2];
+ u32 ctl; /* 0x10 */
+ u32 cfg; /* 0x14 */
+ u32 mode; /* 0x18 */
+ u32 res2;
+};
+
+#endif
+
#endif /* _SUNXI_WATCHDOG_H_ */
#endif /* _SUNXI_WATCHDOG_H_ */