-
-/*
- * Wait up to 1s for value to be set in given part of reg.
- */
-static inline void mctl_await_completion(u32 *reg, u32 mask, u32 val)
-{
- unsigned long tmo = timer_get_us() + 1000000;
-
- while ((readl(reg) & mask) != val) {
- if (timer_get_us() > tmo)
- panic("Timeout initialising DRAM\n");
- }
-}
-
-/*
- * Fill beginning of DRAM with "random" data for mctl_mem_matches()
- */
-static inline void mctl_mem_fill(void)
-{
- int i;
-
- for (i = 0; i < MCTL_MEM_FILL_MATCH_COUNT; i++)
- writel(0xaa55aa55 + i, CONFIG_SYS_SDRAM_BASE + i * 4);
-}
-
-/*
- * Test if memory at offset offset matches memory at begin of DRAM
- */
-static inline bool mctl_mem_matches(u32 offset)
-{
- int i, matches = 0;
-
- for (i = 0; i < MCTL_MEM_FILL_MATCH_COUNT; i++) {
- if (readl(CONFIG_SYS_SDRAM_BASE + i * 4) ==
- readl(CONFIG_SYS_SDRAM_BASE + offset + i * 4))
- matches++;
- }
-
- return matches == MCTL_MEM_FILL_MATCH_COUNT;
-}
+void mctl_await_completion(u32 *reg, u32 mask, u32 val);
+bool mctl_mem_matches(u32 offset);