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arm: dts: add ethernet related node for MT7623 SoC
[oweals/u-boot.git]
/
arch
/
arm
/
dts
/
rk3128.dtsi
diff --git
a/arch/arm/dts/rk3128.dtsi
b/arch/arm/dts/rk3128.dtsi
index 3ef2737f5b51012b446720b52f56dffe63de9f05..5d2499c132449ea13a5522e2b47b476ef3b1b06c 100644
(file)
--- a/
arch/arm/dts/rk3128.dtsi
+++ b/
arch/arm/dts/rk3128.dtsi
@@
-1,7
+1,6
@@
+// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2017 Rockchip Electronics Co., Ltd
/*
* (C) Copyright 2017 Rockchip Electronics Co., Ltd
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <dt-bindings/gpio/gpio.h>
*/
#include <dt-bindings/gpio/gpio.h>
@@
-315,7
+314,7
@@
pwm0: pwm0@20050000 {
compatible = "rockchip,rk3128-pwm", "rockchip,rk3288-pwm";
reg = <0x20050000 0x10>;
pwm0: pwm0@20050000 {
compatible = "rockchip,rk3128-pwm", "rockchip,rk3288-pwm";
reg = <0x20050000 0x10>;
- #pwm-cells = <
2
>;
+ #pwm-cells = <
3
>;
pinctrl-names = "default";
pinctrl-0 = <&pwm0_pin>;
clocks = <&cru PCLK_PWM>;
pinctrl-names = "default";
pinctrl-0 = <&pwm0_pin>;
clocks = <&cru PCLK_PWM>;
@@
-325,7
+324,7
@@
pwm1: pwm1@20050010 {
compatible = "rockchip,rk3128-pwm", "rockchip,rk3288-pwm";
reg = <0x20050010 0x10>;
pwm1: pwm1@20050010 {
compatible = "rockchip,rk3128-pwm", "rockchip,rk3288-pwm";
reg = <0x20050010 0x10>;
- #pwm-cells = <
2
>;
+ #pwm-cells = <
3
>;
pinctrl-names = "default";
pinctrl-0 = <&pwm1_pin>;
clocks = <&cru PCLK_PWM>;
pinctrl-names = "default";
pinctrl-0 = <&pwm1_pin>;
clocks = <&cru PCLK_PWM>;
@@
-335,7
+334,7
@@
pwm2: pwm2@20050020 {
compatible = "rockchip,rk3128-pwm", "rockchip,rk3288-pwm";
reg = <0x20050020 0x10>;
pwm2: pwm2@20050020 {
compatible = "rockchip,rk3128-pwm", "rockchip,rk3288-pwm";
reg = <0x20050020 0x10>;
- #pwm-cells = <
2
>;
+ #pwm-cells = <
3
>;
pinctrl-names = "default";
pinctrl-0 = <&pwm2_pin>;
clocks = <&cru PCLK_PWM>;
pinctrl-names = "default";
pinctrl-0 = <&pwm2_pin>;
clocks = <&cru PCLK_PWM>;
@@
-345,7
+344,7
@@
pwm3: pwm3@20050030 {
compatible = "rockchip,rk3128-pwm", "rockchip,rk3288-pwm";
reg = <0x20050030 0x10>;
pwm3: pwm3@20050030 {
compatible = "rockchip,rk3128-pwm", "rockchip,rk3288-pwm";
reg = <0x20050030 0x10>;
- #pwm-cells = <
2
>;
+ #pwm-cells = <
3
>;
pinctrl-names = "default";
pinctrl-0 = <&pwm3_pin>;
clocks = <&cru PCLK_PWM>;
pinctrl-names = "default";
pinctrl-0 = <&pwm3_pin>;
clocks = <&cru PCLK_PWM>;