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armv8: fsl-layerscape: Fix "cpu release" command
[oweals/u-boot.git]
/
arch
/
arm
/
cpu
/
armv8
/
cache.S
diff --git
a/arch/arm/cpu/armv8/cache.S
b/arch/arm/cpu/armv8/cache.S
index 9c6e8243bb4bc81f731708623e02b5770e5fb163..ab8c08917ad7c5ba1b9e48799b629c3f9f0f5286 100644
(file)
--- a/
arch/arm/cpu/armv8/cache.S
+++ b/
arch/arm/cpu/armv8/cache.S
@@
-9,7
+9,6
@@
#include <asm-offsets.h>
#include <config.h>
#include <asm-offsets.h>
#include <config.h>
-#include <version.h>
#include <asm/macro.h>
#include <linux/linkage.h>
#include <asm/macro.h>
#include <linux/linkage.h>
@@
-113,7
+112,7
@@
ENDPROC(__asm_flush_dcache_all)
ENTRY(__asm_invalidate_dcache_all)
mov x16, lr
ENTRY(__asm_invalidate_dcache_all)
mov x16, lr
- mov x0, #0x
ffff
+ mov x0, #0x
1
bl __asm_dcache_all
mov lr, x16
ret
bl __asm_dcache_all
mov lr, x16
ret
@@
-155,3
+154,9
@@
ENTRY(__asm_invalidate_icache_all)
isb sy
ret
ENDPROC(__asm_invalidate_icache_all)
isb sy
ret
ENDPROC(__asm_invalidate_icache_all)
+
+ENTRY(__asm_flush_l3_cache)
+ mov x0, #0 /* return status as success */
+ ret
+ENDPROC(__asm_flush_l3_cache)
+ .weak __asm_flush_l3_cache