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sunxi: common VBUS detection logic in usbc
[oweals/u-boot.git]
/
arch
/
arm
/
cpu
/
armv7
/
sunxi
/
clock_sun6i.c
diff --git
a/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
b/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
index d7a7040b72c70a27948841c038d4312b0cda46d2..e2a78676b1654fc6fece0f6fe9058957fe04c595 100644
(file)
--- a/
arch/arm/cpu/armv7/sunxi/clock_sun6i.c
+++ b/
arch/arm/cpu/armv7/sunxi/clock_sun6i.c
@@
-45,10
+45,10
@@
void clock_init_safe(void)
void clock_init_uart(void)
{
void clock_init_uart(void)
{
+#if CONFIG_CONS_INDEX < 5
struct sunxi_ccm_reg *const ccm =
(struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
struct sunxi_ccm_reg *const ccm =
(struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
-#if CONFIG_CONS_INDEX < 5
/* uart clock source is apb2 */
writel(APB2_CLK_SRC_OSC24M|
APB2_CLK_RATE_N_1|
/* uart clock source is apb2 */
writel(APB2_CLK_SRC_OSC24M|
APB2_CLK_RATE_N_1|
@@
-68,9
+68,6
@@
void clock_init_uart(void)
/* enable R_PIO and R_UART clocks, and de-assert resets */
prcm_apb0_enable(PRCM_APB0_GATE_PIO | PRCM_APB0_GATE_UART);
#endif
/* enable R_PIO and R_UART clocks, and de-assert resets */
prcm_apb0_enable(PRCM_APB0_GATE_PIO | PRCM_APB0_GATE_UART);
#endif
-
- /* Dup with clock_init_safe(), drop once sun6i SPL support lands */
- writel(PLL6_CFG_DEFAULT, &ccm->pll6_cfg);
}
int clock_twi_onoff(int port, int state)
}
int clock_twi_onoff(int port, int state)