projects
/
oweals
/
u-boot.git
/ blobdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
|
commitdiff
|
tree
raw
|
inline
| side by side
CONFIG_SPL_SYS_[DI]CACHE_OFF: add
[oweals/u-boot.git]
/
arch
/
arm
/
cpu
/
arm11
/
cpu.c
diff --git
a/arch/arm/cpu/arm11/cpu.c
b/arch/arm/cpu/arm11/cpu.c
index 7244c2e7d79e6e6dd34b3009d10b4dc10db4b07b..8aee1539a9db8b7d2a6b6b76af02e603e096f84f 100644
(file)
--- a/
arch/arm/cpu/arm11/cpu.c
+++ b/
arch/arm/cpu/arm11/cpu.c
@@
-1,3
+1,4
@@
+// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2004 Texas Insturments
*
/*
* (C) Copyright 2004 Texas Insturments
*
@@
-7,8
+8,6
@@
*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
/*
*/
/*
@@
-52,12
+51,7
@@
static void cache_flush(void)
asm volatile("mcr p15, 0, %0, c7, c10, 4" : : "r" (i));
}
asm volatile("mcr p15, 0, %0, c7, c10, 4" : : "r" (i));
}
-#ifndef CONFIG_SYS_DCACHE_OFF
-
-#ifndef CONFIG_SYS_CACHELINE_SIZE
-#define CONFIG_SYS_CACHELINE_SIZE 32
-#endif
-
+#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
void invalidate_dcache_all(void)
{
asm volatile("mcr p15, 0, %0, c7, c6, 0" : : "r" (0));
void invalidate_dcache_all(void)
{
asm volatile("mcr p15, 0, %0, c7, c6, 0" : : "r" (0));
@@
-93,7
+87,7
@@
void flush_dcache_range(unsigned long start, unsigned long stop)
asm volatile("mcr p15, 0, %0, c7, c10, 4" : : "r" (0));
}
asm volatile("mcr p15, 0, %0, c7, c10, 4" : : "r" (0));
}
-#else /* #if
ndef CONFIG_SYS_DCACHE_OFF
*/
+#else /* #if
!CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
*/
void invalidate_dcache_all(void)
{
}
void invalidate_dcache_all(void)
{
}
@@
-101,15
+95,15
@@
void invalidate_dcache_all(void)
void flush_dcache_all(void)
{
}
void flush_dcache_all(void)
{
}
-#endif /* #if
ndef CONFIG_SYS_DCACHE_OFF
*/
+#endif /* #if
!CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
*/
-#if !
defined(CONFIG_SYS_ICACHE_OFF) || !defined(CONFIG_SYS_DCACHE_OFF
)
+#if !
(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
)
void enable_caches(void)
{
void enable_caches(void)
{
-#if
ndef CONFIG_SYS_ICACHE_OFF
+#if
!CONFIG_IS_ENABLED(SYS_ICACHE_OFF)
icache_enable();
#endif
icache_enable();
#endif
-#if
ndef CONFIG_SYS_DCACHE_OFF
+#if
!CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
dcache_enable();
#endif
}
dcache_enable();
#endif
}