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armv8: Enable CPUECTLR.SMPEN for coherency
[oweals/u-boot.git]
/
arch
/
arm
/
Kconfig
diff --git
a/arch/arm/Kconfig
b/arch/arm/Kconfig
index 698370becfe500300b0b31db1d4402136025f128..0ed36cded4860114ce1bb34ddd0af96e09706f06 100644
(file)
--- a/
arch/arm/Kconfig
+++ b/
arch/arm/Kconfig
@@
-546,6
+546,7
@@
config ARCH_RMOBILE
config TARGET_S32V234EVB
bool "Support s32v234evb"
select ARM64
config TARGET_S32V234EVB
bool "Support s32v234evb"
select ARM64
+ select SYS_FSL_ERRATUM_ESDHC111
config ARCH_SNAPDRAGON
bool "Qualcomm Snapdragon SoCs"
config ARCH_SNAPDRAGON
bool "Qualcomm Snapdragon SoCs"
@@
-602,22
+603,31
@@
config TARGET_TS4600
config TARGET_TS4800
bool "Support TS4800"
select CPU_V7
config TARGET_TS4800
bool "Support TS4800"
select CPU_V7
+ select SYS_FSL_ERRATUM_ESDHC_A001
config TARGET_VF610TWR
bool "Support vf610twr"
select CPU_V7
config TARGET_VF610TWR
bool "Support vf610twr"
select CPU_V7
+ select SYS_FSL_ERRATUM_ESDHC111
config TARGET_COLIBRI_VF
bool "Support Colibri VF50/61"
select CPU_V7
config TARGET_COLIBRI_VF
bool "Support Colibri VF50/61"
select CPU_V7
+ select SYS_FSL_ERRATUM_ESDHC111
config TARGET_PCM052
bool "Support pcm-052"
select CPU_V7
config TARGET_PCM052
bool "Support pcm-052"
select CPU_V7
+ select SYS_FSL_ERRATUM_ESDHC111
+ select SYS_FSL_ERRATUM_ESDHC135
+ select SYS_FSL_ERRATUM_ESDHC_A001
config TARGET_BK4R1
bool "Support BK4r1"
select CPU_V7
config TARGET_BK4R1
bool "Support BK4r1"
select CPU_V7
+ select SYS_FSL_ERRATUM_ESDHC111
+ select SYS_FSL_ERRATUM_ESDHC135
+ select SYS_FSL_ERRATUM_ESDHC_A001
config ARCH_ZYNQ
bool "Xilinx Zynq Platform"
config ARCH_ZYNQ
bool "Xilinx Zynq Platform"
@@
-770,6
+780,7
@@
config TARGET_LS1021AQDS
select ARCH_LS1021A
select ARCH_SUPPORT_PSCI
select LS1_DEEP_SLEEP
select ARCH_LS1021A
select ARCH_SUPPORT_PSCI
select LS1_DEEP_SLEEP
+ select SYS_FSL_DDR
config TARGET_LS1021ATWR
bool "Support ls1021atwr"
config TARGET_LS1021ATWR
bool "Support ls1021atwr"