// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /dts-v1/; #include #include #include "ar9344.dtsi" / { compatible = "iodata,etg3-r", "qca,ar9344"; model = "I-O DATA ETG3-R"; aliases { led-boot = &led_power; led-failsafe = &led_power; led-running = &led_power; led-upgrade = &led_power; }; leds { compatible = "gpio-leds"; led_power: power { label = "etg3-r:green:power"; gpios = <&gpio 11 GPIO_ACTIVE_LOW>; default-state = "on"; }; notification { label = "etg3-r:green:notification"; gpios = <&gpio 14 GPIO_ACTIVE_LOW>; }; }; keys { compatible = "gpio-keys"; reset { label = "reset"; linux,code = ; gpios = <&gpio 17 GPIO_ACTIVE_LOW>; debounce-interval = <60>; }; }; }; &ref { clock-frequency = <40000000>; }; &spi { status = "okay"; num-cs = <1>; flash@0 { compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <25000000>; partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; partition@0 { label = "u-boot"; reg = <0x000000 0x040000>; read-only; }; partition@40000 { label = "u-boot-env"; reg = <0x040000 0x010000>; }; partition@50000 { compatible = "denx,uimage"; label = "firmware"; reg = <0x050000 0x780000>; }; partition@7d0000 { label = "Config"; reg = <0x07d0000 0x10000>; read-only; }; partition@7e0000 { label = "Rsv"; reg = <0x07e0000 0x10000>; read-only; }; partition@7f0000 { label = "art"; reg = <0x7f0000 0x010000>; read-only; }; }; }; }; &mdio0 { status = "okay"; phy0: ethernet-phy@0 { reg = <0>; phy-mode = "rgmii"; qca,ar8327-initvals = < 0x04 0x07600000 /* PORT0 PAD MODE CTRL */ 0x50 0xffb7ffb7 /* LED_CTRL0 */ 0x54 0xffb7ffb7 /* LED_CTRL1 */ 0x58 0xffb7ffb7 /* LED_CTRL2 */ 0x5c 0x03ffff00 /* LED_CTRL3 */ 0x7c 0x0000007e /* PORT0_STATUS */ >; }; }; ð0 { status = "okay"; pll-data = <0x0e000000 0x00000101 0x00001616>; phy-mode = "rgmii"; phy-handle = <&phy0>; gmac-config { device = <&gmac>; rgmii-gmac0 = <1>; rxd-delay = <3>; rxdv-delay = <3>; }; }; &uart { status = "okay"; };