cfe6e56933b2a303a03de2702d9d3fbeb1c6d58f
[librecmc/librecmc.git] /
1 --- a/arch/arm/dts/Makefile
2 +++ b/arch/arm/dts/Makefile
3 @@ -114,7 +114,8 @@ dtb-$(CONFIG_ROCKCHIP_RK3328) += \
4         rk3328-orangepi-r1-plus-lts.dtb \
5         rk3328-roc-cc.dtb \
6         rk3328-rock64.dtb \
7 -       rk3328-rock-pi-e.dtb
8 +       rk3328-rock-pi-e.dtb \
9 +       rk3328-tpe-r1400.dtb
10  
11  dtb-$(CONFIG_ROCKCHIP_RK3368) += \
12         rk3368-lion-haikou.dtb \
13 --- /dev/null
14 +++ b/arch/arm/dts/rk3328-tpe-r1400-u-boot.dtsi
15 @@ -0,0 +1,3 @@
16 +// SPDX-License-Identifier: GPL-2.0-or-later
17 +
18 +#include "rk3328-nanopi-r2s-u-boot.dtsi"
19 --- /dev/null
20 +++ b/arch/arm/dts/rk3328-tpe-r1400.dts
21 @@ -0,0 +1,16 @@
22 +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
23 +/*
24 + * Copyright (c) 2021 FriendlyElec Computer Tech. Co., Ltd.
25 + * (http://www.friendlyarm.com)
26 + *
27 + * Copyright (c) 2021-2023 Tianling Shen <cnsztl@gmail.com>
28 + */
29 +
30 +
31 +/dts-v1/;
32 +#include "rk3328-nanopi-r2s.dts"
33 +
34 +/ {
35 +       model = "ThinkPenguin TPE-R1400";
36 +       compatible = "thinkpenguin,tpe-r1400", "rockchip,rk3328";
37 +};
38 --- /dev/null
39 +++ b/configs/tpe-r1400-rk3328_defconfig
40 @@ -0,0 +1,98 @@
41 +CONFIG_ARM=y
42 +CONFIG_ARCH_ROCKCHIP=y
43 +CONFIG_SYS_TEXT_BASE=0x00200000
44 +CONFIG_SPL_GPIO_SUPPORT=y
45 +CONFIG_NR_DRAM_BANKS=1
46 +CONFIG_ENV_OFFSET=0x3F8000
47 +CONFIG_DEFAULT_DEVICE_TREE="rk3328-nanopi-r2s"
48 +CONFIG_ROCKCHIP_RK3328=y
49 +CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
50 +CONFIG_TPL_LIBCOMMON_SUPPORT=y
51 +CONFIG_TPL_LIBGENERIC_SUPPORT=y
52 +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
53 +CONFIG_SPL_STACK_R_ADDR=0x600000
54 +CONFIG_DEBUG_UART_BASE=0xFF130000
55 +CONFIG_DEBUG_UART_CLOCK=24000000
56 +CONFIG_DEBUG_UART=y
57 +CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
58 +# CONFIG_ANDROID_BOOT_IMAGE is not set
59 +CONFIG_FIT=y
60 +CONFIG_FIT_VERBOSE=y
61 +CONFIG_SPL_LOAD_FIT=y
62 +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-nanopi-r2s.dtb"
63 +# CONFIG_DISPLAY_CPUINFO is not set
64 +CONFIG_DISPLAY_BOARDINFO_LATE=y
65 +CONFIG_MISC_INIT_R=y
66 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
67 +CONFIG_TPL_SYS_MALLOC_SIMPLE=y
68 +CONFIG_SPL_STACK_R=y
69 +CONFIG_SPL_I2C_SUPPORT=y
70 +CONFIG_SPL_POWER_SUPPORT=y
71 +CONFIG_SPL_ATF=y
72 +CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
73 +CONFIG_CMD_BOOTZ=y
74 +CONFIG_CMD_GPT=y
75 +CONFIG_CMD_MMC=y
76 +CONFIG_CMD_USB=y
77 +# CONFIG_CMD_SETEXPR is not set
78 +CONFIG_CMD_TIME=y
79 +CONFIG_SPL_OF_CONTROL=y
80 +CONFIG_TPL_OF_CONTROL=y
81 +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
82 +CONFIG_TPL_OF_PLATDATA=y
83 +CONFIG_ENV_IS_IN_MMC=y
84 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
85 +CONFIG_NET_RANDOM_ETHADDR=y
86 +CONFIG_TPL_DM=y
87 +CONFIG_REGMAP=y
88 +CONFIG_SPL_REGMAP=y
89 +CONFIG_TPL_REGMAP=y
90 +CONFIG_SYSCON=y
91 +CONFIG_SPL_SYSCON=y
92 +CONFIG_TPL_SYSCON=y
93 +CONFIG_CLK=y
94 +CONFIG_SPL_CLK=y
95 +CONFIG_FASTBOOT_BUF_ADDR=0x800800
96 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
97 +CONFIG_ROCKCHIP_GPIO=y
98 +CONFIG_SYS_I2C_ROCKCHIP=y
99 +CONFIG_MMC_DW=y
100 +CONFIG_MMC_DW_ROCKCHIP=y
101 +CONFIG_SF_DEFAULT_SPEED=20000000
102 +CONFIG_DM_ETH=y
103 +CONFIG_ETH_DESIGNWARE=y
104 +CONFIG_GMAC_ROCKCHIP=y
105 +CONFIG_PINCTRL=y
106 +CONFIG_SPL_PINCTRL=y
107 +CONFIG_DM_PMIC=y
108 +CONFIG_PMIC_RK8XX=y
109 +CONFIG_SPL_DM_REGULATOR=y
110 +CONFIG_REGULATOR_PWM=y
111 +CONFIG_DM_REGULATOR_FIXED=y
112 +CONFIG_SPL_DM_REGULATOR_FIXED=y
113 +CONFIG_REGULATOR_RK8XX=y
114 +CONFIG_PWM_ROCKCHIP=y
115 +CONFIG_RAM=y
116 +CONFIG_SPL_RAM=y
117 +CONFIG_TPL_RAM=y
118 +CONFIG_DM_RESET=y
119 +CONFIG_BAUDRATE=1500000
120 +CONFIG_DEBUG_UART_SHIFT=2
121 +CONFIG_SYSINFO=y
122 +CONFIG_SYSRESET=y
123 +# CONFIG_TPL_SYSRESET is not set
124 +CONFIG_USB=y
125 +CONFIG_USB_XHCI_HCD=y
126 +CONFIG_USB_XHCI_DWC3=y
127 +CONFIG_USB_EHCI_HCD=y
128 +CONFIG_USB_EHCI_GENERIC=y
129 +CONFIG_USB_OHCI_HCD=y
130 +CONFIG_USB_OHCI_GENERIC=y
131 +CONFIG_USB_DWC2=y
132 +CONFIG_USB_DWC3=y
133 +# CONFIG_USB_DWC3_GADGET is not set
134 +CONFIG_USB_GADGET=y
135 +CONFIG_USB_GADGET_DWC2_OTG=y
136 +CONFIG_SPL_TINY_MEMSET=y
137 +CONFIG_TPL_TINY_MEMSET=y
138 +CONFIG_ERRNO_STR=y