84a691343f7ac88f6d9a5ca3318ef6db37e4574f
[oweals/openwrt.git] /
1 From 9f889edf282d1d9a21c921e6cd33cebe22bcc4d4 Mon Sep 17 00:00:00 2001
2 From: Eric Anholt <eric@anholt.net>
3 Date: Wed, 12 Dec 2018 15:51:49 -0800
4 Subject: [PATCH] ARM: bcm283x: Extend the WDT DT node out to cover the
5  whole PM block. (v4)
6
7 It was covering part of the PM block's range, up to the WDT regs.  To
8 support the rest of the PM block's functionality, we need the full
9 register range plus the AXI Async Bridge regs for PM sequencing.
10
11 This doesn't convert any of the consumers over to the new binding yet,
12 since we will need to be careful in coordinating our usage of firmware
13 services that might power domains on and off versus the bcm2835-pm
14 driver's access of those same domains.
15
16 Signed-off-by: Eric Anholt <eric@anholt.net>
17 Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
18 Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
19 (cherry picked from commit 29abc92c1d93e28a8f4d55e6343eec4faf44025a)
20 ---
21  arch/arm/boot/dts/bcm283x.dtsi | 13 +++++++++++--
22  1 file changed, 11 insertions(+), 2 deletions(-)
23
24 --- a/arch/arm/boot/dts/bcm283x.dtsi
25 +++ b/arch/arm/boot/dts/bcm283x.dtsi
26 @@ -121,8 +121,17 @@
27                 };
28  
29                 watchdog@7e100000 {
30 -                       compatible = "brcm,bcm2835-pm-wdt";
31 -                       reg = <0x7e100000 0x28>;
32 +                       compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt";
33 +                       #power-domain-cells = <1>;
34 +                       #reset-cells = <1>;
35 +                       reg = <0x7e100000 0x114>,
36 +                             <0x7e00a000 0x24>;
37 +                       clocks = <&clocks BCM2835_CLOCK_V3D>,
38 +                                <&clocks BCM2835_CLOCK_PERI_IMAGE>,
39 +                                <&clocks BCM2835_CLOCK_H264>,
40 +                                <&clocks BCM2835_CLOCK_ISP>;
41 +                       clock-names = "v3d", "peri_image", "h264", "isp";
42 +                       system-power-controller;
43                 };
44  
45                 clocks: cprman@7e101000 {