1 From 71bd508d7ded8c504ef05d1b4befecfe25e54cb1 Mon Sep 17 00:00:00 2001
2 From: Ian Molton <ian@mnementh.co.uk>
3 Date: Fri, 8 Dec 2017 13:10:29 +0100
4 Subject: [PATCH] brcmfmac: Rename / replace old IO functions with simpler
7 Primarily this patch removes:
9 brcmf_sdiod_f0_writeb()
10 brcmf_sdiod_reg_write()
11 brcmf_sdiod_reg_read()
13 Since we no longer use the quirky method of deciding which function to
14 address via the address being accessed, take the opportunity to rename
15 some IO functions more in line with common kernel code. We also convert
16 those that map directly to sdio_{read,write}*() to macros.
18 Signed-off-by: Ian Molton <ian@mnementh.co.uk>
19 Reviewed-by: Arend van Spriel <arend.vanspriel@broadcom.com>
20 Signed-off-by: Arend van Spriel <arend.vanspriel@broadcom.com>
21 Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
23 .../wireless/broadcom/brcm80211/brcmfmac/bcmsdh.c | 169 +++----------------
24 .../wireless/broadcom/brcm80211/brcmfmac/sdio.c | 186 ++++++++++-----------
25 .../wireless/broadcom/brcm80211/brcmfmac/sdio.h | 28 +++-
26 3 files changed, 138 insertions(+), 245 deletions(-)
28 --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcmsdh.c
29 +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcmsdh.c
30 @@ -137,27 +137,27 @@ int brcmf_sdiod_intr_register(struct brc
31 if (sdiodev->bus_if->chip == BRCM_CC_43362_CHIP_ID) {
32 /* assign GPIO to SDIO core */
33 addr = CORE_CC_REG(SI_ENUM_BASE, gpiocontrol);
34 - gpiocontrol = brcmf_sdiod_regrl(sdiodev, addr, &ret);
35 + gpiocontrol = brcmf_sdiod_readl(sdiodev, addr, &ret);
37 - brcmf_sdiod_regwl(sdiodev, addr, gpiocontrol, &ret);
38 + brcmf_sdiod_writel(sdiodev, addr, gpiocontrol, &ret);
40 - brcmf_sdiod_regwb(sdiodev, SBSDIO_GPIO_SELECT, 0xf,
42 - brcmf_sdiod_regwb(sdiodev, SBSDIO_GPIO_OUT, 0, &ret);
43 - brcmf_sdiod_regwb(sdiodev, SBSDIO_GPIO_EN, 0x2, &ret);
44 + brcmf_sdiod_writeb(sdiodev, SBSDIO_GPIO_SELECT,
46 + brcmf_sdiod_writeb(sdiodev, SBSDIO_GPIO_OUT, 0, &ret);
47 + brcmf_sdiod_writeb(sdiodev, SBSDIO_GPIO_EN, 0x2, &ret);
50 /* must configure SDIO_CCCR_IENx to enable irq */
51 - data = brcmf_sdiod_regrb(sdiodev, SDIO_CCCR_IENx, &ret);
52 + data = brcmf_sdiod_func0_rb(sdiodev, SDIO_CCCR_IENx, &ret);
53 data |= 1 << SDIO_FUNC_1 | 1 << SDIO_FUNC_2 | 1;
54 - brcmf_sdiod_regwb(sdiodev, SDIO_CCCR_IENx, data, &ret);
55 + brcmf_sdiod_func0_wb(sdiodev, SDIO_CCCR_IENx, data, &ret);
57 /* redirect, configure and enable io for interrupt signal */
58 data = SDIO_SEPINT_MASK | SDIO_SEPINT_OE;
59 if (pdata->oob_irq_flags & IRQF_TRIGGER_HIGH)
60 data |= SDIO_SEPINT_ACT_HI;
61 - brcmf_sdiod_regwb(sdiodev, SDIO_CCCR_BRCM_SEPINT, data, &ret);
63 + brcmf_sdiod_func0_wb(sdiodev, SDIO_CCCR_BRCM_SEPINT,
65 sdio_release_host(sdiodev->func[1]);
67 brcmf_dbg(SDIO, "Entering\n");
68 @@ -183,8 +183,8 @@ void brcmf_sdiod_intr_unregister(struct
70 pdata = &sdiodev->settings->bus.sdio;
71 sdio_claim_host(sdiodev->func[1]);
72 - brcmf_sdiod_regwb(sdiodev, SDIO_CCCR_BRCM_SEPINT, 0, NULL);
73 - brcmf_sdiod_regwb(sdiodev, SDIO_CCCR_IENx, 0, NULL);
74 + brcmf_sdiod_func0_wb(sdiodev, SDIO_CCCR_BRCM_SEPINT, 0, NULL);
75 + brcmf_sdiod_func0_wb(sdiodev, SDIO_CCCR_IENx, 0, NULL);
76 sdio_release_host(sdiodev->func[1]);
78 sdiodev->oob_irq_requested = false;
79 @@ -242,8 +242,8 @@ static int brcmf_sdiod_set_sbaddr_window
80 addr = (address & SBSDIO_SBWINDOW_MASK) >> 8;
82 for (i = 0 ; i < 3 && !err ; i++, addr >>= 8)
83 - brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_SBADDRLOW + i,
85 + brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_SBADDRLOW + i,
90 @@ -267,124 +267,15 @@ static int brcmf_sdiod_addrprep(struct b
94 -static inline int brcmf_sdiod_f0_writeb(struct sdio_func *func, u8 byte,
100 - * Can only directly write to some F0 registers.
101 - * Handle CCCR_IENx and CCCR_ABORT command
102 - * as a special case.
104 - if ((regaddr == SDIO_CCCR_ABORT) ||
105 - (regaddr == SDIO_CCCR_IENx))
106 - sdio_writeb(func, byte, regaddr, &err_ret);
108 - sdio_f0_writeb(func, byte, regaddr, &err_ret);
113 -static int brcmf_sdiod_reg_write(struct brcmf_sdio_dev *sdiodev, u32 addr,
114 - u8 regsz, void *data)
119 - * figure out how to read the register based on address range
120 - * 0x00 ~ 0x7FF: function 0 CCCR and FBR
121 - * 0x10000 ~ 0x1FFFF: function 1 miscellaneous registers
122 - * The rest: function 1 silicon backplane core registers
123 - * f0 writes must be bytewise
126 - if ((addr & ~REG_F0_REG_MASK) == 0) {
127 - if (WARN_ON(regsz > 1))
129 - ret = brcmf_sdiod_f0_writeb(sdiodev->func[0],
130 - *(u8 *)data, addr);
134 - sdio_writeb(sdiodev->func[1], *(u8 *)data, addr, &ret);
137 - ret = brcmf_sdiod_addrprep(sdiodev, &addr);
141 - sdio_writel(sdiodev->func[1], *(u32 *)data, addr, &ret);
144 - WARN(1, "Invalid reg size\n");
154 -static int brcmf_sdiod_reg_read(struct brcmf_sdio_dev *sdiodev, u32 addr,
155 - u8 regsz, void *data)
160 - * figure out how to read the register based on address range
161 - * 0x00 ~ 0x7FF: function 0 CCCR and FBR
162 - * 0x10000 ~ 0x1FFFF: function 1 miscellaneous registers
163 - * The rest: function 1 silicon backplane core registers
164 - * f0 reads must be bytewise
166 - if ((addr & ~REG_F0_REG_MASK) == 0) {
167 - if (WARN_ON(regsz > 1))
169 - *(u8 *)data = sdio_f0_readb(sdiodev->func[0], addr, &ret);
173 - *(u8 *)data = sdio_readb(sdiodev->func[1], addr, &ret);
176 - ret = brcmf_sdiod_addrprep(sdiodev, &addr);
180 - *(u32 *)data = sdio_readl(sdiodev->func[1], addr, &ret);
183 - WARN(1, "Invalid reg size\n");
193 -u8 brcmf_sdiod_regrb(struct brcmf_sdio_dev *sdiodev, u32 addr, int *ret)
194 +u32 brcmf_sdiod_readl(struct brcmf_sdio_dev *sdiodev, u32 addr, int *ret)
200 - retval = brcmf_sdiod_reg_read(sdiodev, addr, 1, &data);
201 + retval = brcmf_sdiod_addrprep(sdiodev, &addr);
209 -u32 brcmf_sdiod_regrl(struct brcmf_sdio_dev *sdiodev, u32 addr, int *ret)
214 - retval = brcmf_sdiod_reg_read(sdiodev, addr, 4, &data);
216 + data = sdio_readl(sdiodev->func[1], addr, &retval);
220 @@ -392,23 +283,15 @@ u32 brcmf_sdiod_regrl(struct brcmf_sdio_
224 -void brcmf_sdiod_regwb(struct brcmf_sdio_dev *sdiodev, u32 addr,
226 +void brcmf_sdiod_writel(struct brcmf_sdio_dev *sdiodev, u32 addr,
227 + u32 data, int *ret)
231 - retval = brcmf_sdiod_reg_write(sdiodev, addr, 1, &data);
237 -void brcmf_sdiod_regwl(struct brcmf_sdio_dev *sdiodev, u32 addr,
238 - u32 data, int *ret)
241 + retval = brcmf_sdiod_addrprep(sdiodev, &addr);
243 - retval = brcmf_sdiod_reg_write(sdiodev, addr, 4, &data);
245 + sdio_writel(sdiodev->func[1], data, addr, &retval);
249 @@ -846,8 +729,8 @@ int brcmf_sdiod_abort(struct brcmf_sdio_
251 brcmf_dbg(SDIO, "Enter\n");
253 - /* issue abort cmd52 command through F0 */
254 - brcmf_sdiod_reg_write(sdiodev, SDIO_CCCR_ABORT, 1, &fn);
255 + /* Issue abort cmd52 command through F0 */
256 + brcmf_sdiod_func0_wb(sdiodev, SDIO_CCCR_ABORT, fn, NULL);
258 brcmf_dbg(SDIO, "Exit\n");
260 --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c
261 +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c
262 @@ -669,7 +669,7 @@ static int r_sdreg32(struct brcmf_sdio *
265 core = brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV);
266 - *regvar = brcmf_sdiod_regrl(bus->sdiodev, core->base + offset, &ret);
267 + *regvar = brcmf_sdiod_readl(bus->sdiodev, core->base + offset, &ret);
271 @@ -680,7 +680,7 @@ static int w_sdreg32(struct brcmf_sdio *
274 core = brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV);
275 - brcmf_sdiod_regwl(bus->sdiodev, core->base + reg_offset, regval, &ret);
276 + brcmf_sdiod_writel(bus->sdiodev, core->base + reg_offset, regval, &ret);
280 @@ -697,8 +697,7 @@ brcmf_sdio_kso_control(struct brcmf_sdio
282 wr_val = (on << SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
283 /* 1st KSO write goes to AOS wake up core if device is asleep */
284 - brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
286 + brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR, wr_val, &err);
289 /* device WAKEUP through KSO:
290 @@ -724,7 +723,7 @@ brcmf_sdio_kso_control(struct brcmf_sdio
291 * just one write attempt may fail,
292 * read it back until it matches written value
294 - rd_val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
295 + rd_val = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
298 if ((rd_val & bmask) == cmp_val)
299 @@ -734,9 +733,11 @@ brcmf_sdio_kso_control(struct brcmf_sdio
300 /* bail out upon subsequent access errors */
301 if (err && (err_cnt++ > BRCMF_SDIO_MAX_ACCESS_ERRORS))
305 - brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
307 + brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR, wr_val,
310 } while (try_cnt++ < MAX_KSO_ATTEMPTS);
313 @@ -772,15 +773,15 @@ static int brcmf_sdio_htclk(struct brcmf
315 bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
317 - brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
319 + brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
322 brcmf_err("HT Avail request error: %d\n", err);
326 /* Check current status */
327 - clkctl = brcmf_sdiod_regrb(bus->sdiodev,
328 + clkctl = brcmf_sdiod_readb(bus->sdiodev,
329 SBSDIO_FUNC1_CHIPCLKCSR, &err);
331 brcmf_err("HT Avail read error: %d\n", err);
332 @@ -790,35 +791,34 @@ static int brcmf_sdio_htclk(struct brcmf
333 /* Go to pending and await interrupt if appropriate */
334 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
335 /* Allow only clock-available interrupt */
336 - devctl = brcmf_sdiod_regrb(bus->sdiodev,
337 + devctl = brcmf_sdiod_readb(bus->sdiodev,
338 SBSDIO_DEVICE_CTL, &err);
340 - brcmf_err("Devctl error setting CA: %d\n",
342 + brcmf_err("Devctl error setting CA: %d\n", err);
346 devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
347 - brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
349 + brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_DEVICE_CTL,
351 brcmf_dbg(SDIO, "CLKCTL: set PENDING\n");
352 bus->clkstate = CLK_PENDING;
355 } else if (bus->clkstate == CLK_PENDING) {
356 /* Cancel CA-only interrupt filter */
357 - devctl = brcmf_sdiod_regrb(bus->sdiodev,
358 + devctl = brcmf_sdiod_readb(bus->sdiodev,
359 SBSDIO_DEVICE_CTL, &err);
360 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
361 - brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
363 + brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_DEVICE_CTL,
367 /* Otherwise, wait here (polling) for HT Avail */
369 msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
370 while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
371 - clkctl = brcmf_sdiod_regrb(bus->sdiodev,
372 + clkctl = brcmf_sdiod_readb(bus->sdiodev,
373 SBSDIO_FUNC1_CHIPCLKCSR,
375 if (time_after(jiffies, timeout))
376 @@ -852,16 +852,16 @@ static int brcmf_sdio_htclk(struct brcmf
378 if (bus->clkstate == CLK_PENDING) {
379 /* Cancel CA-only interrupt filter */
380 - devctl = brcmf_sdiod_regrb(bus->sdiodev,
381 + devctl = brcmf_sdiod_readb(bus->sdiodev,
382 SBSDIO_DEVICE_CTL, &err);
383 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
384 - brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
386 + brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_DEVICE_CTL,
390 bus->clkstate = CLK_SDONLY;
391 - brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
393 + brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
395 brcmf_dbg(SDIO, "CLKCTL: turned OFF\n");
397 brcmf_err("Failed access turning clock off: %d\n",
398 @@ -951,14 +951,14 @@ brcmf_sdio_bus_sleep(struct brcmf_sdio *
402 - clkcsr = brcmf_sdiod_regrb(bus->sdiodev,
403 + clkcsr = brcmf_sdiod_readb(bus->sdiodev,
404 SBSDIO_FUNC1_CHIPCLKCSR,
406 if ((clkcsr & SBSDIO_CSR_MASK) == 0) {
407 brcmf_dbg(SDIO, "no clock, set ALP\n");
408 - brcmf_sdiod_regwb(bus->sdiodev,
409 - SBSDIO_FUNC1_CHIPCLKCSR,
410 - SBSDIO_ALP_AVAIL_REQ, &err);
411 + brcmf_sdiod_writeb(bus->sdiodev,
412 + SBSDIO_FUNC1_CHIPCLKCSR,
413 + SBSDIO_ALP_AVAIL_REQ, &err);
415 err = brcmf_sdio_kso_control(bus, false);
417 @@ -1178,16 +1178,16 @@ static void brcmf_sdio_rxfail(struct brc
419 brcmf_sdiod_abort(bus->sdiodev, SDIO_FUNC_2);
421 - brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
422 - SFC_RF_TERM, &err);
423 + brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL, SFC_RF_TERM,
425 bus->sdcnt.f1regdata++;
427 /* Wait until the packet has been flushed (device/FIFO stable) */
428 for (lastrbc = retries = 0xffff; retries > 0; retries--) {
429 - hi = brcmf_sdiod_regrb(bus->sdiodev,
430 - SBSDIO_FUNC1_RFRAMEBCHI, &err);
431 - lo = brcmf_sdiod_regrb(bus->sdiodev,
432 - SBSDIO_FUNC1_RFRAMEBCLO, &err);
433 + hi = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_FUNC1_RFRAMEBCHI,
435 + lo = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_FUNC1_RFRAMEBCLO,
437 bus->sdcnt.f1regdata += 2;
439 if ((hi == 0) && (lo == 0))
440 @@ -1229,12 +1229,12 @@ static void brcmf_sdio_txfail(struct brc
441 bus->sdcnt.tx_sderrs++;
443 brcmf_sdiod_abort(sdiodev, SDIO_FUNC_2);
444 - brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM, NULL);
445 + brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM, NULL);
446 bus->sdcnt.f1regdata++;
448 for (i = 0; i < 3; i++) {
449 - hi = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_WFRAMEBCHI, NULL);
450 - lo = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_WFRAMEBCLO, NULL);
451 + hi = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_WFRAMEBCHI, NULL);
452 + lo = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_WFRAMEBCLO, NULL);
453 bus->sdcnt.f1regdata += 2;
454 if ((hi == 0) && (lo == 0))
456 @@ -2446,11 +2446,11 @@ static void brcmf_sdio_bus_stop(struct d
457 bus->hostintmask = 0;
459 /* Force backplane clocks to assure F2 interrupt propagates */
460 - saveclk = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
461 + saveclk = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
464 - brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
465 - (saveclk | SBSDIO_FORCE_HT), &err);
466 + brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
467 + (saveclk | SBSDIO_FORCE_HT), &err);
469 brcmf_err("Failed to force clock for F2: err %d\n",
471 @@ -2509,7 +2509,7 @@ static int brcmf_sdio_intr_rstatus(struc
472 buscore = brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV);
473 addr = buscore->base + offsetof(struct sdpcmd_regs, intstatus);
475 - val = brcmf_sdiod_regrl(bus->sdiodev, addr, &ret);
476 + val = brcmf_sdiod_readl(bus->sdiodev, addr, &ret);
477 bus->sdcnt.f1regdata++;
480 @@ -2519,7 +2519,7 @@ static int brcmf_sdio_intr_rstatus(struc
482 /* Clear interrupts */
484 - brcmf_sdiod_regwl(bus->sdiodev, addr, val, &ret);
485 + brcmf_sdiod_writel(bus->sdiodev, addr, val, &ret);
486 bus->sdcnt.f1regdata++;
487 atomic_or(val, &bus->intstatus);
489 @@ -2545,23 +2545,23 @@ static void brcmf_sdio_dpc(struct brcmf_
492 /* Check for inconsistent device control */
493 - devctl = brcmf_sdiod_regrb(bus->sdiodev,
494 - SBSDIO_DEVICE_CTL, &err);
495 + devctl = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_DEVICE_CTL,
499 /* Read CSR, if clock on switch to AVAIL, else ignore */
500 - clkctl = brcmf_sdiod_regrb(bus->sdiodev,
501 + clkctl = brcmf_sdiod_readb(bus->sdiodev,
502 SBSDIO_FUNC1_CHIPCLKCSR, &err);
504 brcmf_dbg(SDIO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
507 if (SBSDIO_HTAV(clkctl)) {
508 - devctl = brcmf_sdiod_regrb(bus->sdiodev,
509 + devctl = brcmf_sdiod_readb(bus->sdiodev,
510 SBSDIO_DEVICE_CTL, &err);
511 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
512 - brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
514 + brcmf_sdiod_writeb(bus->sdiodev,
515 + SBSDIO_DEVICE_CTL, devctl, &err);
516 bus->clkstate = CLK_AVAIL;
519 @@ -3347,31 +3347,31 @@ static void brcmf_sdio_sr_init(struct br
521 brcmf_dbg(TRACE, "Enter\n");
523 - val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, &err);
524 + val = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, &err);
526 brcmf_err("error reading SBSDIO_FUNC1_WAKEUPCTRL\n");
530 val |= 1 << SBSDIO_FUNC1_WCTRL_HTWAIT_SHIFT;
531 - brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, val, &err);
532 + brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, val, &err);
534 brcmf_err("error writing SBSDIO_FUNC1_WAKEUPCTRL\n");
538 /* Add CMD14 Support */
539 - brcmf_sdiod_regwb(bus->sdiodev, SDIO_CCCR_BRCM_CARDCAP,
540 - (SDIO_CCCR_BRCM_CARDCAP_CMD14_SUPPORT |
541 - SDIO_CCCR_BRCM_CARDCAP_CMD14_EXT),
543 + brcmf_sdiod_func0_wb(bus->sdiodev, SDIO_CCCR_BRCM_CARDCAP,
544 + (SDIO_CCCR_BRCM_CARDCAP_CMD14_SUPPORT |
545 + SDIO_CCCR_BRCM_CARDCAP_CMD14_EXT),
548 brcmf_err("error writing SDIO_CCCR_BRCM_CARDCAP\n");
552 - brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
553 - SBSDIO_FORCE_HT, &err);
554 + brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
555 + SBSDIO_FORCE_HT, &err);
557 brcmf_err("error writing SBSDIO_FUNC1_CHIPCLKCSR\n");
559 @@ -3394,7 +3394,7 @@ static int brcmf_sdio_kso_init(struct br
560 if (brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV)->rev < 12)
563 - val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR, &err);
564 + val = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR, &err);
566 brcmf_err("error reading SBSDIO_FUNC1_SLEEPCSR\n");
568 @@ -3403,8 +3403,8 @@ static int brcmf_sdio_kso_init(struct br
569 if (!(val & SBSDIO_FUNC1_SLEEPCSR_KSO_MASK)) {
570 val |= (SBSDIO_FUNC1_SLEEPCSR_KSO_EN <<
571 SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
572 - brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
574 + brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
577 brcmf_err("error writing SBSDIO_FUNC1_SLEEPCSR\n");
579 @@ -3565,9 +3565,9 @@ static void brcmf_sdio_bus_watchdog(stru
582 sdio_claim_host(bus->sdiodev->func[1]);
583 - devpend = brcmf_sdiod_regrb(bus->sdiodev,
586 + devpend = brcmf_sdiod_func0_rb(bus->sdiodev,
589 sdio_release_host(bus->sdiodev->func[1]);
590 intstatus = devpend & (INTR_STATUS_FUNC1 |
592 @@ -3705,12 +3705,12 @@ brcmf_sdio_drivestrengthinit(struct brcm
595 addr = CORE_CC_REG(pmu->base, chipcontrol_addr);
596 - brcmf_sdiod_regwl(sdiodev, addr, 1, NULL);
597 - cc_data_temp = brcmf_sdiod_regrl(sdiodev, addr, NULL);
598 + brcmf_sdiod_writel(sdiodev, addr, 1, NULL);
599 + cc_data_temp = brcmf_sdiod_readl(sdiodev, addr, NULL);
600 cc_data_temp &= ~str_mask;
601 drivestrength_sel <<= str_shift;
602 cc_data_temp |= drivestrength_sel;
603 - brcmf_sdiod_regwl(sdiodev, addr, cc_data_temp, NULL);
604 + brcmf_sdiod_writel(sdiodev, addr, cc_data_temp, NULL);
606 brcmf_dbg(INFO, "SDIO: %d mA (req=%d mA) drive strength selected, set to 0x%08x\n",
607 str_tab[i].strength, drivestrength, cc_data_temp);
608 @@ -3725,7 +3725,7 @@ static int brcmf_sdio_buscoreprep(void *
610 /* Try forcing SDIO core to do ALPAvail request only */
611 clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_ALP_AVAIL_REQ;
612 - brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
613 + brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
615 brcmf_err("error writing for HT off\n");
617 @@ -3733,8 +3733,7 @@ static int brcmf_sdio_buscoreprep(void *
619 /* If register supported, wait for ALPAvail and then force ALP */
620 /* This may take up to 15 milliseconds */
621 - clkval = brcmf_sdiod_regrb(sdiodev,
622 - SBSDIO_FUNC1_CHIPCLKCSR, NULL);
623 + clkval = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, NULL);
625 if ((clkval & ~SBSDIO_AVBITS) != clkset) {
626 brcmf_err("ChipClkCSR access: wrote 0x%02x read 0x%02x\n",
627 @@ -3742,10 +3741,11 @@ static int brcmf_sdio_buscoreprep(void *
631 - SPINWAIT(((clkval = brcmf_sdiod_regrb(sdiodev,
632 - SBSDIO_FUNC1_CHIPCLKCSR, NULL)),
633 - !SBSDIO_ALPAV(clkval)),
634 - PMU_MAX_TRANSITION_DLY);
635 + SPINWAIT(((clkval = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
637 + !SBSDIO_ALPAV(clkval)),
638 + PMU_MAX_TRANSITION_DLY);
640 if (!SBSDIO_ALPAV(clkval)) {
641 brcmf_err("timeout on ALPAV wait, clkval 0x%02x\n",
643 @@ -3753,11 +3753,11 @@ static int brcmf_sdio_buscoreprep(void *
646 clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_FORCE_ALP;
647 - brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
648 + brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
651 /* Also, disable the extra SDIO pull-ups */
652 - brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_SDIOPULLUP, 0, NULL);
653 + brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_SDIOPULLUP, 0, NULL);
657 @@ -3772,7 +3772,7 @@ static void brcmf_sdio_buscore_activate(
658 /* clear all interrupts */
659 core = brcmf_chip_get_core(chip, BCMA_CORE_SDIO_DEV);
660 reg_addr = core->base + offsetof(struct sdpcmd_regs, intstatus);
661 - brcmf_sdiod_regwl(sdiodev, reg_addr, 0xFFFFFFFF, NULL);
662 + brcmf_sdiod_writel(sdiodev, reg_addr, 0xFFFFFFFF, NULL);
665 /* Write reset vector to address 0 */
666 @@ -3785,7 +3785,7 @@ static u32 brcmf_sdio_buscore_read32(voi
667 struct brcmf_sdio_dev *sdiodev = ctx;
670 - val = brcmf_sdiod_regrl(sdiodev, addr, NULL);
671 + val = brcmf_sdiod_readl(sdiodev, addr, NULL);
672 if ((sdiodev->func[0]->device == SDIO_DEVICE_ID_BROADCOM_4335_4339 ||
673 sdiodev->func[0]->device == SDIO_DEVICE_ID_BROADCOM_4339) &&
674 addr == CORE_CC_REG(SI_ENUM_BASE, chipid)) {
675 @@ -3802,7 +3802,7 @@ static void brcmf_sdio_buscore_write32(v
677 struct brcmf_sdio_dev *sdiodev = ctx;
679 - brcmf_sdiod_regwl(sdiodev, addr, val, NULL);
680 + brcmf_sdiod_writel(sdiodev, addr, val, NULL);
683 static const struct brcmf_buscore_ops brcmf_sdio_buscore_ops = {
684 @@ -3826,18 +3826,18 @@ brcmf_sdio_probe_attach(struct brcmf_sdi
685 sdio_claim_host(sdiodev->func[1]);
687 pr_debug("F1 signature read @0x18000000=0x%4x\n",
688 - brcmf_sdiod_regrl(sdiodev, SI_ENUM_BASE, NULL));
689 + brcmf_sdiod_readl(sdiodev, SI_ENUM_BASE, NULL));
692 * Force PLL off until brcmf_chip_attach()
693 * programs PLL control regs
696 - brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
697 - BRCMF_INIT_CLKCTL1, &err);
698 + brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, BRCMF_INIT_CLKCTL1,
701 - clkctl = brcmf_sdiod_regrb(sdiodev,
702 - SBSDIO_FUNC1_CHIPCLKCSR, &err);
703 + clkctl = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
706 if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
707 brcmf_err("ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
708 @@ -3897,25 +3897,25 @@ brcmf_sdio_probe_attach(struct brcmf_sdi
709 brcmf_sdio_drivestrengthinit(sdiodev, bus->ci, drivestrength);
711 /* Set card control so an SDIO card reset does a WLAN backplane reset */
712 - reg_val = brcmf_sdiod_regrb(sdiodev, SDIO_CCCR_BRCM_CARDCTRL, &err);
713 + reg_val = brcmf_sdiod_func0_rb(sdiodev, SDIO_CCCR_BRCM_CARDCTRL, &err);
717 reg_val |= SDIO_CCCR_BRCM_CARDCTRL_WLANRESET;
719 - brcmf_sdiod_regwb(sdiodev, SDIO_CCCR_BRCM_CARDCTRL, reg_val, &err);
720 + brcmf_sdiod_func0_wb(sdiodev, SDIO_CCCR_BRCM_CARDCTRL, reg_val, &err);
724 /* set PMUControl so a backplane reset does PMU state reload */
725 reg_addr = CORE_CC_REG(brcmf_chip_get_pmu(bus->ci)->base, pmucontrol);
726 - reg_val = brcmf_sdiod_regrl(sdiodev, reg_addr, &err);
727 + reg_val = brcmf_sdiod_readl(sdiodev, reg_addr, &err);
731 reg_val |= (BCMA_CC_PMU_CTL_RES_RELOAD << BCMA_CC_PMU_CTL_RES_SHIFT);
733 - brcmf_sdiod_regwl(sdiodev, reg_addr, reg_val, &err);
734 + brcmf_sdiod_writel(sdiodev, reg_addr, reg_val, &err);
738 @@ -4055,10 +4055,10 @@ static void brcmf_sdio_firmware_callback
741 /* Force clocks on backplane to be sure F2 interrupt propagates */
742 - saveclk = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, &err);
743 + saveclk = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, &err);
745 - brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
746 - (saveclk | SBSDIO_FORCE_HT), &err);
747 + brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
748 + (saveclk | SBSDIO_FORCE_HT), &err);
751 brcmf_err("Failed to force clock for F2: err %d\n", err);
752 @@ -4080,7 +4080,7 @@ static void brcmf_sdio_firmware_callback
753 w_sdreg32(bus, bus->hostintmask,
754 offsetof(struct sdpcmd_regs, hostintmask));
756 - brcmf_sdiod_regwb(sdiodev, SBSDIO_WATERMARK, 8, &err);
757 + brcmf_sdiod_writeb(sdiodev, SBSDIO_WATERMARK, 8, &err);
759 /* Disable F2 again */
760 sdio_disable_func(sdiodev->func[SDIO_FUNC_2]);
761 @@ -4091,8 +4091,8 @@ static void brcmf_sdio_firmware_callback
762 brcmf_sdio_sr_init(bus);
764 /* Restore previous clock setting */
765 - brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
767 + brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
772 @@ -4225,7 +4225,7 @@ struct brcmf_sdio *brcmf_sdio_probe(stru
775 /* Done with backplane-dependent accesses, can drop clock... */
776 - brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
777 + brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
779 sdio_release_host(bus->sdiodev->func[1]);
781 --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.h
782 +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.h
784 #define SBSDIO_NUM_FUNCTION 3
786 /* function 0 vendor specific CCCR registers */
788 #define SDIO_CCCR_BRCM_CARDCAP 0xf0
789 #define SDIO_CCCR_BRCM_CARDCAP_CMD14_SUPPORT 0x02
790 #define SDIO_CCCR_BRCM_CARDCAP_CMD14_EXT 0x04
792 /* with b15, maps to 32-bit SB access */
793 #define SBSDIO_SB_ACCESS_2_4B_FLAG 0x08000
795 -/* valid bits in SBSDIO_FUNC1_SBADDRxxx regs */
797 /* Address bits from SBADDR regs */
798 #define SBSDIO_SBWINDOW_MASK 0xffff8000
800 @@ -293,13 +292,24 @@ struct sdpcmd_regs {
801 int brcmf_sdiod_intr_register(struct brcmf_sdio_dev *sdiodev);
802 void brcmf_sdiod_intr_unregister(struct brcmf_sdio_dev *sdiodev);
804 -/* sdio device register access interface */
805 -u8 brcmf_sdiod_regrb(struct brcmf_sdio_dev *sdiodev, u32 addr, int *ret);
806 -u32 brcmf_sdiod_regrl(struct brcmf_sdio_dev *sdiodev, u32 addr, int *ret);
807 -void brcmf_sdiod_regwb(struct brcmf_sdio_dev *sdiodev, u32 addr, u8 data,
809 -void brcmf_sdiod_regwl(struct brcmf_sdio_dev *sdiodev, u32 addr, u32 data,
811 +/* SDIO device register access interface */
812 +/* Accessors for SDIO Function 0 */
813 +#define brcmf_sdiod_func0_rb(sdiodev, addr, r) \
814 + sdio_readb((sdiodev)->func[0], (addr), (r))
816 +#define brcmf_sdiod_func0_wb(sdiodev, addr, v, ret) \
817 + sdio_writeb((sdiodev)->func[0], (v), (addr), (ret))
819 +/* Accessors for SDIO Function 1 */
820 +#define brcmf_sdiod_readb(sdiodev, addr, r) \
821 + sdio_readb((sdiodev)->func[1], (addr), (r))
823 +#define brcmf_sdiod_writeb(sdiodev, addr, v, ret) \
824 + sdio_writeb((sdiodev)->func[1], (v), (addr), (ret))
826 +u32 brcmf_sdiod_readl(struct brcmf_sdio_dev *sdiodev, u32 addr, int *ret);
827 +void brcmf_sdiod_writel(struct brcmf_sdio_dev *sdiodev, u32 addr, u32 data,
830 /* Buffer transfer to/from device (client) core via cmd53.
831 * fn: function number