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   1 From 69968f88f1770d61cae0febef805fd00d66cf6a1 Mon Sep 17 00:00:00 2001
   2 From: Sriram R <quic_srirrama@quicinc.com>
   3 Date: Fri, 2 Dec 2022 23:37:15 +0200
   4 Subject: [PATCH] wifi: ath11k: add new hw ops for IPQ5018 to get rx dest ring
   5  hashmap
   6
   7 The Destination ring control register is different
   8 for IPQ5018 when compared to IPQ8074/IPQ6018/QCN9074.
   9 Hence create a new hw ops to fetch the hash ring map
  10 for different device variants. ipq5018 hw ops
  11 is similar to qcn9074 except for this change, so reuse
  12 all the qcn9074 ops for ipq5018.
  13
  14 Tested-on: IPQ5018 hw1.0 AHB WLAN.HK.2.6.0.1-00861-QCAHKSWPL_SILICONZ-1
  15
  16 Signed-off-by: Sriram R <quic_srirrama@quicinc.com>
  17 Co-developed-by: Karthikeyan Kathirvel <quic_kathirve@quicinc.com>
  18 Signed-off-by: Karthikeyan Kathirvel <quic_kathirve@quicinc.com>
  19 Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
  20 Link: https://lore.kernel.org/r/20221122132152.17771-8-quic_kathirve@quicinc.com
  21 ---
  22  drivers/net/wireless/ath/ath11k/hw.c | 44 ++++++++++++++++++++++++++++
  23  1 file changed, 44 insertions(+)
  24
  25 --- a/drivers/net/wireless/ath/ath11k/hw.c
  26 +++ b/drivers/net/wireless/ath/ath11k/hw.c
  27 @@ -791,6 +791,49 @@ static void ath11k_hw_wcn6855_reo_setup(
  28                            ring_hash_map);
  29  }
  30
  31 +static void ath11k_hw_ipq5018_reo_setup(struct ath11k_base *ab)
  32 +{
  33 +       u32 reo_base = HAL_SEQ_WCSS_UMAC_REO_REG;
  34 +       u32 val;
  35 +
  36 +       /* Each hash entry uses three bits to map to a particular ring. */
  37 +       u32 ring_hash_map = HAL_HASH_ROUTING_RING_SW1 << 0 |
  38 +               HAL_HASH_ROUTING_RING_SW2 << 4 |
  39 +               HAL_HASH_ROUTING_RING_SW3 << 8 |
  40 +               HAL_HASH_ROUTING_RING_SW4 << 12 |
  41 +               HAL_HASH_ROUTING_RING_SW1 << 16 |
  42 +               HAL_HASH_ROUTING_RING_SW2 << 20 |
  43 +               HAL_HASH_ROUTING_RING_SW3 << 24 |
  44 +               HAL_HASH_ROUTING_RING_SW4 << 28;
  45 +
  46 +       val = ath11k_hif_read32(ab, reo_base + HAL_REO1_GEN_ENABLE);
  47 +
  48 +       val &= ~HAL_REO1_GEN_ENABLE_FRAG_DST_RING;
  49 +       val |= FIELD_PREP(HAL_REO1_GEN_ENABLE_FRAG_DST_RING,
  50 +                       HAL_SRNG_RING_ID_REO2SW1) |
  51 +               FIELD_PREP(HAL_REO1_GEN_ENABLE_AGING_LIST_ENABLE, 1) |
  52 +               FIELD_PREP(HAL_REO1_GEN_ENABLE_AGING_FLUSH_ENABLE, 1);
  53 +       ath11k_hif_write32(ab, reo_base + HAL_REO1_GEN_ENABLE, val);
  54 +
  55 +       ath11k_hif_write32(ab, reo_base + HAL_REO1_AGING_THRESH_IX_0(ab),
  56 +                          HAL_DEFAULT_REO_TIMEOUT_USEC);
  57 +       ath11k_hif_write32(ab, reo_base + HAL_REO1_AGING_THRESH_IX_1(ab),
  58 +                          HAL_DEFAULT_REO_TIMEOUT_USEC);
  59 +       ath11k_hif_write32(ab, reo_base + HAL_REO1_AGING_THRESH_IX_2(ab),
  60 +                          HAL_DEFAULT_REO_TIMEOUT_USEC);
  61 +       ath11k_hif_write32(ab, reo_base + HAL_REO1_AGING_THRESH_IX_3(ab),
  62 +                          HAL_DEFAULT_REO_TIMEOUT_USEC);
  63 +
  64 +       ath11k_hif_write32(ab, reo_base + HAL_REO1_DEST_RING_CTRL_IX_0,
  65 +                          ring_hash_map);
  66 +       ath11k_hif_write32(ab, reo_base + HAL_REO1_DEST_RING_CTRL_IX_1,
  67 +                          ring_hash_map);
  68 +       ath11k_hif_write32(ab, reo_base + HAL_REO1_DEST_RING_CTRL_IX_2,
  69 +                          ring_hash_map);
  70 +       ath11k_hif_write32(ab, reo_base + HAL_REO1_DEST_RING_CTRL_IX_3,
  71 +                          ring_hash_map);
  72 +}
  73 +
  74  static u16 ath11k_hw_ipq8074_mpdu_info_get_peerid(u8 *tlv_data)
  75  {
  76         u16 peer_id = 0;
  77 @@ -1117,6 +1160,7 @@ const struct ath11k_hw_ops ipq5018_ops =
  78         .rx_desc_get_mpdu_ppdu_id = ath11k_hw_qcn9074_rx_desc_get_mpdu_ppdu_id,
  79         .rx_desc_set_msdu_len = ath11k_hw_qcn9074_rx_desc_set_msdu_len,
  80         .rx_desc_get_attention = ath11k_hw_qcn9074_rx_desc_get_attention,
  81 +       .reo_setup = ath11k_hw_ipq5018_reo_setup,
  82         .rx_desc_get_msdu_payload = ath11k_hw_qcn9074_rx_desc_get_msdu_payload,
  83         .mpdu_info_get_peerid = ath11k_hw_ipq8074_mpdu_info_get_peerid,
  84         .rx_desc_mac_addr2_valid = ath11k_hw_ipq9074_rx_desc_mac_addr2_valid,