5bc195528e44483cf9654c29b4a905160681a6fc
[librecmc/librecmc.git] /
1 From 25e289e1f52e1f4fb1d07622c6a24f8d8a8e420d Mon Sep 17 00:00:00 2001
2 From: Aditya Kumar Singh <quic_adisi@quicinc.com>
3 Date: Wed, 1 Mar 2023 16:20:58 +0200
4 Subject: [PATCH] wifi: ath11k: use proper regulatory reference for bands
5
6 Currently, during regulatory event, 2 GHz/5 GHz is referred
7 to as 2G/5G including variable names. However, there is no
8 such entity as 2G or 5G.
9
10 Re-name such occurences to its proper name. No functional changes.
11
12 Tested-on: IPQ8074 hw2.0 AHB WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
13 Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1
14 Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.5.0.1-01100-QCAHKSWPL_SILICONZ-1
15
16 Signed-off-by: Aditya Kumar Singh <quic_adisi@quicinc.com>
17 Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
18 Link: https://lore.kernel.org/r/20230110121024.14051-2-quic_adisi@quicinc.com
19 ---
20  drivers/net/wireless/ath/ath11k/reg.c | 20 ++++-----
21  drivers/net/wireless/ath/ath11k/wmi.c | 58 ++++++++++++++-------------
22  drivers/net/wireless/ath/ath11k/wmi.h | 28 ++++++-------
23  3 files changed, 54 insertions(+), 52 deletions(-)
24
25 --- a/drivers/net/wireless/ath/ath11k/reg.c
26 +++ b/drivers/net/wireless/ath/ath11k/reg.c
27 @@ -619,7 +619,7 @@ ath11k_reg_build_regd(struct ath11k_base
28         u32 flags;
29         char alpha2[3];
30  
31 -       num_rules = reg_info->num_5g_reg_rules + reg_info->num_2g_reg_rules;
32 +       num_rules = reg_info->num_5ghz_reg_rules + reg_info->num_2ghz_reg_rules;
33  
34         if (!num_rules)
35                 goto ret;
36 @@ -644,20 +644,20 @@ ath11k_reg_build_regd(struct ath11k_base
37                    alpha2, ath11k_reg_get_regdom_str(tmp_regd->dfs_region),
38                    reg_info->dfs_region, num_rules);
39         /* Update reg_rules[] below. Firmware is expected to
40 -        * send these rules in order(2G rules first and then 5G)
41 +        * send these rules in order(2 GHz rules first and then 5 GHz)
42          */
43         for (; i < num_rules; i++) {
44 -               if (reg_info->num_2g_reg_rules &&
45 -                   (i < reg_info->num_2g_reg_rules)) {
46 -                       reg_rule = reg_info->reg_rules_2g_ptr + i;
47 +               if (reg_info->num_2ghz_reg_rules &&
48 +                   (i < reg_info->num_2ghz_reg_rules)) {
49 +                       reg_rule = reg_info->reg_rules_2ghz_ptr + i;
50                         max_bw = min_t(u16, reg_rule->max_bw,
51 -                                      reg_info->max_bw_2g);
52 +                                      reg_info->max_bw_2ghz);
53                         flags = 0;
54 -               } else if (reg_info->num_5g_reg_rules &&
55 -                          (j < reg_info->num_5g_reg_rules)) {
56 -                       reg_rule = reg_info->reg_rules_5g_ptr + j++;
57 +               } else if (reg_info->num_5ghz_reg_rules &&
58 +                          (j < reg_info->num_5ghz_reg_rules)) {
59 +                       reg_rule = reg_info->reg_rules_5ghz_ptr + j++;
60                         max_bw = min_t(u16, reg_rule->max_bw,
61 -                                      reg_info->max_bw_5g);
62 +                                      reg_info->max_bw_5ghz);
63  
64                         /* FW doesn't pass NL80211_RRF_AUTO_BW flag for
65                          * BW Auto correction, we can enable this by default
66 --- a/drivers/net/wireless/ath/ath11k/wmi.c
67 +++ b/drivers/net/wireless/ath/ath11k/wmi.c
68 @@ -4959,7 +4959,7 @@ static int ath11k_pull_reg_chan_list_upd
69         const void **tb;
70         const struct wmi_reg_chan_list_cc_event *chan_list_event_hdr;
71         struct wmi_regulatory_rule_struct *wmi_reg_rule;
72 -       u32 num_2g_reg_rules, num_5g_reg_rules;
73 +       u32 num_2ghz_reg_rules, num_5ghz_reg_rules;
74         int ret;
75  
76         ath11k_dbg(ab, ATH11K_DBG_WMI, "processing regulatory channel list\n");
77 @@ -4978,10 +4978,10 @@ static int ath11k_pull_reg_chan_list_upd
78                 return -EPROTO;
79         }
80  
81 -       reg_info->num_2g_reg_rules = chan_list_event_hdr->num_2g_reg_rules;
82 -       reg_info->num_5g_reg_rules = chan_list_event_hdr->num_5g_reg_rules;
83 +       reg_info->num_2ghz_reg_rules = chan_list_event_hdr->num_2ghz_reg_rules;
84 +       reg_info->num_5ghz_reg_rules = chan_list_event_hdr->num_5ghz_reg_rules;
85  
86 -       if (!(reg_info->num_2g_reg_rules + reg_info->num_5g_reg_rules)) {
87 +       if (!(reg_info->num_2ghz_reg_rules + reg_info->num_5ghz_reg_rules)) {
88                 ath11k_warn(ab, "No regulatory rules available in the event info\n");
89                 kfree(tb);
90                 return -EINVAL;
91 @@ -5008,46 +5008,48 @@ static int ath11k_pull_reg_chan_list_upd
92         else if (chan_list_event_hdr->status_code == WMI_REG_SET_CC_STATUS_FAIL)
93                 reg_info->status_code = REG_SET_CC_STATUS_FAIL;
94  
95 -       reg_info->min_bw_2g = chan_list_event_hdr->min_bw_2g;
96 -       reg_info->max_bw_2g = chan_list_event_hdr->max_bw_2g;
97 -       reg_info->min_bw_5g = chan_list_event_hdr->min_bw_5g;
98 -       reg_info->max_bw_5g = chan_list_event_hdr->max_bw_5g;
99 +       reg_info->min_bw_2ghz = chan_list_event_hdr->min_bw_2ghz;
100 +       reg_info->max_bw_2ghz = chan_list_event_hdr->max_bw_2ghz;
101 +       reg_info->min_bw_5ghz = chan_list_event_hdr->min_bw_5ghz;
102 +       reg_info->max_bw_5ghz = chan_list_event_hdr->max_bw_5ghz;
103  
104 -       num_2g_reg_rules = reg_info->num_2g_reg_rules;
105 -       num_5g_reg_rules = reg_info->num_5g_reg_rules;
106 +       num_2ghz_reg_rules = reg_info->num_2ghz_reg_rules;
107 +       num_5ghz_reg_rules = reg_info->num_5ghz_reg_rules;
108  
109         ath11k_dbg(ab, ATH11K_DBG_WMI,
110 -                  "%s:cc %s dsf %d BW: min_2g %d max_2g %d min_5g %d max_5g %d",
111 +                  "%s:cc %s dsf %d BW: min_2ghz %d max_2ghz %d min_5ghz %d max_5ghz %d",
112                    __func__, reg_info->alpha2, reg_info->dfs_region,
113 -                  reg_info->min_bw_2g, reg_info->max_bw_2g,
114 -                  reg_info->min_bw_5g, reg_info->max_bw_5g);
115 +                  reg_info->min_bw_2ghz, reg_info->max_bw_2ghz,
116 +                  reg_info->min_bw_5ghz, reg_info->max_bw_5ghz);
117  
118         ath11k_dbg(ab, ATH11K_DBG_WMI,
119 -                  "%s: num_2g_reg_rules %d num_5g_reg_rules %d", __func__,
120 -                  num_2g_reg_rules, num_5g_reg_rules);
121 +                  "%s: num_2ghz_reg_rules %d num_5ghz_reg_rules %d", __func__,
122 +                  num_2ghz_reg_rules, num_5ghz_reg_rules);
123  
124         wmi_reg_rule =
125                 (struct wmi_regulatory_rule_struct *)((u8 *)chan_list_event_hdr
126                                                 + sizeof(*chan_list_event_hdr)
127                                                 + sizeof(struct wmi_tlv));
128  
129 -       if (num_2g_reg_rules) {
130 -               reg_info->reg_rules_2g_ptr = create_reg_rules_from_wmi(num_2g_reg_rules,
131 -                                                                      wmi_reg_rule);
132 -               if (!reg_info->reg_rules_2g_ptr) {
133 +       if (num_2ghz_reg_rules) {
134 +               reg_info->reg_rules_2ghz_ptr =
135 +                               create_reg_rules_from_wmi(num_2ghz_reg_rules,
136 +                                                         wmi_reg_rule);
137 +               if (!reg_info->reg_rules_2ghz_ptr) {
138                         kfree(tb);
139 -                       ath11k_warn(ab, "Unable to Allocate memory for 2g rules\n");
140 +                       ath11k_warn(ab, "Unable to Allocate memory for 2 GHz rules\n");
141                         return -ENOMEM;
142                 }
143         }
144  
145 -       if (num_5g_reg_rules) {
146 -               wmi_reg_rule += num_2g_reg_rules;
147 -               reg_info->reg_rules_5g_ptr = create_reg_rules_from_wmi(num_5g_reg_rules,
148 -                                                                      wmi_reg_rule);
149 -               if (!reg_info->reg_rules_5g_ptr) {
150 +       if (num_5ghz_reg_rules) {
151 +               wmi_reg_rule += num_2ghz_reg_rules;
152 +               reg_info->reg_rules_5ghz_ptr =
153 +                               create_reg_rules_from_wmi(num_5ghz_reg_rules,
154 +                                                         wmi_reg_rule);
155 +               if (!reg_info->reg_rules_5ghz_ptr) {
156                         kfree(tb);
157 -                       ath11k_warn(ab, "Unable to Allocate memory for 5g rules\n");
158 +                       ath11k_warn(ab, "Unable to Allocate memory for 5 GHz rules\n");
159                         return -ENOMEM;
160                 }
161         }
162 @@ -6619,8 +6621,8 @@ fallback:
163         WARN_ON(1);
164  mem_free:
165         if (reg_info) {
166 -               kfree(reg_info->reg_rules_2g_ptr);
167 -               kfree(reg_info->reg_rules_5g_ptr);
168 +               kfree(reg_info->reg_rules_2ghz_ptr);
169 +               kfree(reg_info->reg_rules_5ghz_ptr);
170                 kfree(reg_info);
171         }
172         return ret;
173 --- a/drivers/net/wireless/ath/ath11k/wmi.h
174 +++ b/drivers/net/wireless/ath/ath11k/wmi.h
175 @@ -4129,14 +4129,14 @@ struct cur_regulatory_info {
176         u8 alpha2[REG_ALPHA2_LEN + 1];
177         u32 dfs_region;
178         u32 phybitmap;
179 -       u32 min_bw_2g;
180 -       u32 max_bw_2g;
181 -       u32 min_bw_5g;
182 -       u32 max_bw_5g;
183 -       u32 num_2g_reg_rules;
184 -       u32 num_5g_reg_rules;
185 -       struct cur_reg_rule *reg_rules_2g_ptr;
186 -       struct cur_reg_rule *reg_rules_5g_ptr;
187 +       u32 min_bw_2ghz;
188 +       u32 max_bw_2ghz;
189 +       u32 min_bw_5ghz;
190 +       u32 max_bw_5ghz;
191 +       u32 num_2ghz_reg_rules;
192 +       u32 num_5ghz_reg_rules;
193 +       struct cur_reg_rule *reg_rules_2ghz_ptr;
194 +       struct cur_reg_rule *reg_rules_5ghz_ptr;
195  };
196  
197  struct wmi_reg_chan_list_cc_event {
198 @@ -4148,12 +4148,12 @@ struct wmi_reg_chan_list_cc_event {
199         u32 domain_code;
200         u32 dfs_region;
201         u32 phybitmap;
202 -       u32 min_bw_2g;
203 -       u32 max_bw_2g;
204 -       u32 min_bw_5g;
205 -       u32 max_bw_5g;
206 -       u32 num_2g_reg_rules;
207 -       u32 num_5g_reg_rules;
208 +       u32 min_bw_2ghz;
209 +       u32 max_bw_2ghz;
210 +       u32 min_bw_5ghz;
211 +       u32 max_bw_5ghz;
212 +       u32 num_2ghz_reg_rules;
213 +       u32 num_5ghz_reg_rules;
214  } __packed;
215  
216  struct wmi_regulatory_rule_struct {