First tests with O/C recovery mode for AR9331
[oweals/u-boot_mod.git] / u-boot / include / configs / ar7240.h
1 /*
2  * This file contains the configuration parameters for the dbau1x00 board.
3  */
4
5 #ifndef __AR7240_H
6 #define __AR7240_H
7
8 #ifndef CONFIG_BOOTDELAY
9 #define CONFIG_BOOTDELAY        1                                                                       /* autoboot after x seconds */
10 #endif
11
12 #define CONFIG_MENUPROMPT                       "Hit any key to stop autobooting: %2d "
13 #define CONFIG_AUTOBOOT_PROMPT          "Autobooting in:\t%d s (type 'tpl' to run U-Boot console)\n\n"
14 #define CONFIG_AUTOBOOT_STOP_STR        "tpl"
15 #undef  CONFIG_AUTOBOOT_DELAY_STR
16 #define DEBUG_BOOTKEYS                          0
17 #define CONFIG_BAUDRATE                         115200
18 #define CFG_BAUDRATE_TABLE                      {115200}
19
20 /*
21  * Miscellaneous configurable options
22  */
23 #define CFG_ALT_MEMTEST
24 #define CFG_LONGHELP                                                                                    /* undef to save memory      */
25 #define CFG_PROMPT                      "uboot> "                                                       /* Monitor Command Prompt    */
26 #define CFG_CBSIZE                      512                                                                     /* Console I/O Buffer Size   */
27 #define CFG_PBSIZE                      (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)      /* Print Buffer Size, was: def + 16 */
28 #define CFG_MAXARGS                     16                                                                      /* max number of command */
29 #define CFG_MALLOC_LEN          512*1024                                                        // def: 128*1024
30 #define CFG_BOOTPARAMS_LEN      512*1024                                                        // def: 128
31 #define CFG_SDRAM_BASE          0x80000000                                                      /* Cached addr */
32 #define CFG_MEMTEST_START       0x80200000
33 #define CFG_MEMTEST_END         0x83800000
34 #define CFG_RX_ETH_BUFFER   16
35
36 /*
37  ** PLL Config for different CPU/DDR/AHB frequencies
38  */
39 #define CFG_PLL_400_400_200                     1
40 #define CFG_PLL_412_412_206                     2
41 #define CFG_PLL_425_425_212                     3
42 #define CFG_PLL_437_437_218                     4
43 #define CFG_PLL_450_450_225                     5
44 #define CFG_PLL_462_462_231                     6
45 #define CFG_PLL_475_475_237                     7
46 #define CFG_PLL_487_487_243                     8
47 #define CFG_PLL_500_500_250                     9
48 #define CFG_PLL_500_250_250                     10
49 #define CFG_PLL_562_281_140                     11
50 #define CFG_PLL_525_262_131                     12
51 #define CFG_PLL_525_525_262                     13
52
53 // WASP
54 #define CFG_PLL_566_400_200                     0x31
55 #define CFG_PLL_566_500_250                     0x32
56 #define CFG_PLL_600_1_2G_400_200        0x33
57 #define CFG_PLL_560_480_240                     0x34
58
59 /*-----------------------------------------------------------------------
60  * Cache Configuration
61  */
62 #define CFG_DCACHE_SIZE                         32768
63 #define CFG_ICACHE_SIZE                         65536
64 #define CFG_CACHELINE_SIZE                      32
65
66 #endif  /* __CONFIG_H */