u-boot/include/configs/ap143.h

   1 /*
   2  * Copyright (C) 2016 Piotr Dymacz <piotr@dymacz.pl>
   3  *
   4  * This file contains the configuration parameters
   5  * for Qualcomm Atheros QCA953x based devices
   6  *
   7  * Reference designs: AP143
   8  *
   9  * SPDX-License-Identifier: GPL-2.0
  10  */
  11
  12 #ifndef _AP143_H
  13 #define _AP143_H
  14
  15 #include <config.h>
  16 #include <configs/qca9k_common.h>
  17 #include <soc/soc_common.h>
  18
  19 /*
  20  * ==================
  21  * GPIO configuration
  22  * ==================
  23  */
  24 #if defined(CONFIG_FOR_COMFAST_CF_E314N)
  25
  26         #define CONFIG_QCA_GPIO_MASK_LED_ACT_H  GPIO4  | GPIO11 | GPIO14 |\
  27                                                 GPIO15 | GPIO16
  28         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO0 | GPIO2 | GPIO3
  29         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_H |\
  30                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_L
  31         #define CONFIG_QCA_GPIO_MASK_IN         GPIO17
  32         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
  33         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_L CONFIG_QCA_GPIO_MASK_LED_ACT_H
  34
  35 #elif defined(CONFIG_FOR_COMFAST_CF_E320N_V2)
  36
  37         #define CONFIG_QCA_GPIO_MASK_LED_ACT_H  GPIO0 | GPIO2 | GPIO3
  38         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_H
  39         #define CONFIG_QCA_GPIO_MASK_IN         GPIO17
  40         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_L CONFIG_QCA_GPIO_MASK_LED_ACT_H
  41
  42 #elif defined(CONFIG_FOR_COMFAST_CF_E520N_CF_E530N)
  43
  44         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO11
  45         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
  46         #define CONFIG_QCA_GPIO_MASK_IN         GPIO17
  47         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
  48
  49 #elif defined(CONFIG_FOR_TPLINK_WR820N_CN) ||\
  50       defined(CONFIG_FOR_TPLINK_WR802N)
  51
  52         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO13
  53         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
  54         #define CONFIG_QCA_GPIO_MASK_IN         GPIO12
  55         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
  56
  57 #elif defined(CONFIG_FOR_TPLINK_WR841N_V9)
  58
  59         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO3  | GPIO4  | GPIO11 |\
  60                                                 GPIO13 | GPIO14 | GPIO15 |\
  61                                                 GPIO16
  62         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
  63         #define CONFIG_QCA_GPIO_MASK_IN         GPIO12 | GPIO17
  64         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
  65
  66 #elif defined(CONFIG_FOR_WALLYS_DR531)
  67
  68         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO11 | GPIO12 | GPIO13 |\
  69                                                 GPIO14 | GPIO15 | GPIO16
  70         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
  71         #define CONFIG_QCA_GPIO_MASK_IN         GPIO17
  72         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
  73
  74 #elif defined(CONFIG_FOR_YUNCORE_AP90Q)
  75
  76         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO4 | GPIO12 | GPIO16
  77         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
  78         #define CONFIG_QCA_GPIO_MASK_IN         GPIO17
  79         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
  80
  81 #elif defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
  82
  83         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO4  | GPIO11 | GPIO12 |\
  84                                                 GPIO13 | GPIO14 | GPIO15 |\
  85                                                 GPIO16
  86         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
  87         #define CONFIG_QCA_GPIO_MASK_IN         GPIO17
  88         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
  89
  90 #endif
  91
  92 /*
  93  * ================
  94  * Default bootargs
  95  * ================
  96  */
  97 #if defined(CONFIG_FOR_COMFAST_CF_E314N) ||\
  98     defined(CONFIG_FOR_COMFAST_CF_E320N_V2)
  99
 100         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:03 "\
 101                                 "rootfstype=jffs2 init=/sbin/init "\
 102                                 "mtdparts=ath-nor0:64k(u-boot),64k(art),1536k(uImage),14656k(rootfs),64k(mib0)"
 103
 104 #elif defined(CONFIG_FOR_COMFAST_CF_E520N_CF_E530N)
 105
 106         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:03 "\
 107                                 "rootfstype=jffs2 init=/sbin/init "\
 108                                 "mtdparts=ath-nor0:64k(u-boot),64k(art),1536k(uImage),6464k(rootfs),64k(mib0)"
 109
 110 #elif defined(CONFIG_FOR_TPLINK_WR820N_CN)
 111
 112         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 113                                 "rootfstype=squashfs init=/sbin/init "\
 114                                 "mtdparts=ath-nor0:32k(u-boot1),32k(u-boot2),3008k(rootfs),896k(uImage),64k(mib0),64k(art)"
 115
 116 #elif defined(CONFIG_FOR_TPLINK_WR841N_V9) ||\
 117       defined(CONFIG_FOR_TPLINK_WR802N)
 118
 119         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 120                                 "rootfstype=squashfs init=/sbin/init "\
 121                                 "mtdparts=ath-nor0:128k(u-boot),1024k(kernel),2816k(rootfs),64k(config),64k(art)"
 122
 123 #elif defined(CONFIG_FOR_WALLYS_DR531)
 124
 125         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 126                                 "rootfstype=jffs2 init=/sbin/init "\
 127                                 "mtdparts=ath-nor0:256k(u-boot),64k(u-boot-env),6336k(rootfs),1408k"
 128
 129 #elif defined(CONFIG_FOR_YUNCORE_AP90Q) ||\
 130       defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 131
 132         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 133                                 "rootfstype=squashfs init=/sbin/init "\
 134                                 "mtdparts=spi0.0:256k(u-boot),64k(u-boot-env),14528k(rootfs),1472k(kernel),64k(art),16000k(firmware)"
 135
 136 #endif
 137
 138 /*
 139  * =============================
 140  * Load address and boot command
 141  * =============================
 142  */
 143 #if defined(CONFIG_FOR_COMFAST_CF_E314N)          ||\
 144     defined(CONFIG_FOR_COMFAST_CF_E320N_V2)       ||\
 145     defined(CONFIG_FOR_COMFAST_CF_E520N_CF_E530N) ||\
 146     defined(CONFIG_FOR_TPLINK_WR820N_CN)          ||\
 147     defined(CONFIG_FOR_TPLINK_WR802N)             ||\
 148     defined(CONFIG_FOR_TPLINK_WR841N_V9)
 149         #define CFG_LOAD_ADDR   0x9F020000
 150 #elif defined(CONFIG_FOR_WALLYS_DR531)
 151         #define CFG_LOAD_ADDR   0x9F050000
 152 #elif defined(CONFIG_FOR_YUNCORE_AP90Q) ||\
 153       defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 154         #define CFG_LOAD_ADDR   0x9FE80000
 155 #endif
 156
 157 #define CONFIG_BOOTCOMMAND      "bootm " MK_STR(CFG_LOAD_ADDR)
 158
 159 /*
 160  * =========================
 161  * Environment configuration
 162  * =========================
 163  */
 164 #if defined(CONFIG_FOR_COMFAST_CF_E314N)    ||\
 165     defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 166     defined(CONFIG_FOR_COMFAST_CF_E520N_CF_E530N)
 167         #define CFG_ENV_ADDR            0x9F018000
 168         #define CFG_ENV_SIZE            0x7C00
 169         #define CFG_ENV_SECT_SIZE       0x10000
 170 #elif defined(CONFIG_FOR_TPLINK_WR820N_CN) ||\
 171       defined(CONFIG_FOR_TPLINK_WR802N)    ||\
 172       defined(CONFIG_FOR_TPLINK_WR841N_V9)
 173         #define CFG_ENV_ADDR            0x9F01EC00
 174         #define CFG_ENV_SIZE            0x1000
 175         #define CFG_ENV_SECT_SIZE       0x10000
 176 #elif defined(CONFIG_FOR_WALLYS_DR531)
 177         #define CFG_ENV_ADDR            0x9F030000
 178         #define CFG_ENV_SIZE            0xF800
 179         #define CFG_ENV_SECT_SIZE       0x10000
 180 #elif defined(CONFIG_FOR_YUNCORE_AP90Q) ||\
 181       defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 182         #define CFG_ENV_ADDR            0x9F040000
 183         #define CFG_ENV_SIZE            0xFC00
 184         #define CFG_ENV_SECT_SIZE       0x10000
 185 #endif
 186
 187 /*
 188  * ===========================
 189  * List of available baudrates
 190  * ===========================
 191  */
 192 #define CFG_BAUDRATE_TABLE      \
 193                 { 600,    1200,   2400,    4800,    9600,    14400, \
 194                   19200,  28800,  38400,   56000,   57600,   115200 }
 195
 196 /*
 197  * ==================================================
 198  * MAC address/es, model and WPS pin offsets in FLASH
 199  * ==================================================
 200  */
 201 #if defined(CONFIG_FOR_COMFAST_CF_E314N)    ||\
 202     defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 203     defined(CONFIG_FOR_COMFAST_CF_E520N_CF_E530N)
 204         #define OFFSET_MAC_DATA_BLOCK           0x10000
 205         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x10000
 206         #define OFFSET_MAC_ADDRESS              0x00000
 207 #elif defined(CONFIG_FOR_TPLINK_WR820N_CN) ||\
 208       defined(CONFIG_FOR_TPLINK_WR802N)    ||\
 209       defined(CONFIG_FOR_TPLINK_WR841N_V9)
 210         #define OFFSET_MAC_DATA_BLOCK           0x010000
 211         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x010000
 212         #define OFFSET_MAC_ADDRESS              0x00FC00
 213         #define OFFSET_ROUTER_MODEL             0x00FD00
 214         #define OFFSET_PIN_NUMBER               0x00FE00
 215 #elif defined(CONFIG_FOR_WALLYS_DR531)
 216         #define OFFSET_MAC_DATA_BLOCK           0x030000
 217         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x010000
 218         #define OFFSET_MAC_ADDRESS              0x00F810
 219 #elif defined(CONFIG_FOR_YUNCORE_AP90Q) ||\
 220       defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 221         #define OFFSET_MAC_DATA_BLOCK           0xFF0000
 222         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x010000
 223         #define OFFSET_MAC_ADDRESS              0x000000
 224 #endif
 225
 226 /*
 227  * =========================
 228  * Custom changes per device
 229  * =========================
 230  */
 231
 232 /*
 233  * Comfast CF-E520N and E320Nv2 are limited to 64 KB only,
 234  * disable some commands
 235  */
 236 #if defined(CONFIG_FOR_COMFAST_CF_E314N)    ||\
 237     defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 238     defined(CONFIG_FOR_COMFAST_CF_E520N_CF_E530N)
 239         #undef CONFIG_CMD_DHCP
 240         #undef CONFIG_CMD_LOADB
 241         #undef CONFIG_CMD_SNTP
 242 #endif
 243
 244 /*
 245  * ===========================
 246  * HTTP recovery configuration
 247  * ===========================
 248  */
 249 #if defined(CONFIG_FOR_YUNCORE_AP90Q) ||\
 250     defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 251         #define WEBFAILSAFE_UPLOAD_KERNEL_ADDRESS       CFG_FLASH_BASE + 0x50000
 252 #else
 253         #define WEBFAILSAFE_UPLOAD_KERNEL_ADDRESS       CFG_LOAD_ADDR
 254 #endif
 255
 256 /* Firmware size limit */
 257 #if defined(CONFIG_FOR_COMFAST_CF_E314N)          ||\
 258     defined(CONFIG_FOR_COMFAST_CF_E320N_V2)       ||\
 259     defined(CONFIG_FOR_COMFAST_CF_E520N_CF_E530N) ||\
 260     defined(CONFIG_FOR_TPLINK_WR820N_CN)          ||\
 261     defined(CONFIG_FOR_TPLINK_WR802N)             ||\
 262     defined(CONFIG_FOR_TPLINK_WR841N_V9)
 263         #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (192 * 1024)
 264 #elif defined(CONFIG_FOR_WALLYS_DR531)  ||\
 265       defined(CONFIG_FOR_YUNCORE_AP90Q) ||\
 266       defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 267         #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (384 * 1024)
 268 #endif
 269
 270 /*
 271  * ========================
 272  * PLL/Clocks configuration
 273  * ========================
 274  */
 275 #if defined(CONFIG_FOR_TPLINK_WR820N_CN) ||\
 276     defined(CONFIG_FOR_TPLINK_WR802N)    ||\
 277     defined(CONFIG_FOR_TPLINK_WR841N_V9)
 278         #define CONFIG_QCA_PLL  QCA_PLL_PRESET_550_400_200
 279 #elif defined(CONFIG_FOR_COMFAST_CF_E314N)          ||\
 280       defined(CONFIG_FOR_COMFAST_CF_E320N_V2)       ||\
 281       defined(CONFIG_FOR_COMFAST_CF_E520N_CF_E530N) ||\
 282       defined(CONFIG_FOR_WALLYS_DR531)              ||\
 283       defined(CONFIG_FOR_YUNCORE_AP90Q)             ||\
 284       defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 285         #define CONFIG_QCA_PLL  QCA_PLL_PRESET_650_400_200
 286 #endif
 287
 288 #if defined(CONFIG_FOR_COMFAST_CF_E314N)          ||\
 289     defined(CONFIG_FOR_COMFAST_CF_E320N_V2)       ||\
 290     defined(CONFIG_FOR_COMFAST_CF_E520N_CF_E530N) ||\
 291     defined(CONFIG_FOR_TPLINK_WR820N_CN)          ||\
 292     defined(CONFIG_FOR_TPLINK_WR802N)             ||\
 293     defined(CONFIG_FOR_TPLINK_WR841N_V9)
 294
 295         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET    0x10000
 296         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE      0x10000
 297
 298 #elif defined(CONFIG_FOR_WALLYS_DR531)
 299
 300         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET    0x30000
 301         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE      0x10000
 302
 303 #elif defined(CONFIG_FOR_YUNCORE_AP90Q) ||\
 304       defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 305
 306         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET    0x40000
 307         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE      0x10000
 308
 309 #endif
 310
 311 /*
 312  * ==================================
 313  * For upgrade scripts in environment
 314  * ==================================
 315  */
 316 #if !defined(CONFIG_FOR_COMFAST_CF_E314N)          &&\
 317     !defined(CONFIG_FOR_COMFAST_CF_E320N_V2)       &&\
 318     !defined(CONFIG_FOR_COMFAST_CF_E520N_CF_E530N) &&\
 319     !defined(CONFIG_FOR_WALLYS_DR531)              &&\
 320     !defined(CONFIG_FOR_YUNCORE_AP90Q)             &&\
 321     !defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 322         #define CONFIG_UPG_UBOOT_SIZE_BACKUP_HEX        0x20000
 323 #endif
 324
 325 #if defined(CONFIG_FOR_YUNCORE_AP90Q) ||\
 326     defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 327         #define CONFIG_UPG_SCRIPTS_FW_ADDR_HEX  0x9F050000
 328 #endif
 329
 330 /*
 331  * ===================
 332  * Other configuration
 333  * ===================
 334  */
 335
 336 /* Cache lock for stack */
 337 #define CONFIG_INIT_SRAM_SP_OFFSET      0xbd001800
 338
 339 #endif /* _AP143_H */