u-boot/include/configs/ap143.h

   1 /*
   2  * Copyright (C) 2016 Piotr Dymacz <piotr@dymacz.pl>
   3  *
   4  * This file contains the configuration parameters
   5  * for Qualcomm Atheros QCA953x based devices
   6  *
   7  * Reference designs: AP143
   8  *
   9  * SPDX-License-Identifier: GPL-2.0
  10  */
  11
  12 #ifndef _AP143_H
  13 #define _AP143_H
  14
  15 #include <config.h>
  16 #include <configs/qca9k_common.h>
  17 #include <soc/soc_common.h>
  18
  19 /*
  20  * ==================
  21  * GPIO configuration
  22  * ==================
  23  */
  24 #if defined(CONFIG_FOR_COMFAST_CF_E320N_V2)
  25
  26         #define CONFIG_QCA_GPIO_MASK_LED_ACT_H  GPIO0 | GPIO2 | GPIO3
  27         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_H
  28         #define CONFIG_QCA_GPIO_MASK_IN         GPIO17
  29         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_L CONFIG_QCA_GPIO_MASK_LED_ACT_H
  30
  31 #elif defined(CONFIG_FOR_COMFAST_CF_E520N)
  32
  33         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO11
  34         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
  35         #define CONFIG_QCA_GPIO_MASK_IN         GPIO17
  36         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
  37
  38 #elif defined(CONFIG_FOR_TPLINK_WR820N_CN) ||\
  39       defined(CONFIG_FOR_TPLINK_WR802N)
  40
  41         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO13
  42         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
  43         #define CONFIG_QCA_GPIO_MASK_IN         GPIO12
  44         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
  45
  46 #elif defined(CONFIG_FOR_TPLINK_WR841N_V9)
  47
  48         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO3  | GPIO4  | GPIO11 |\
  49                                                 GPIO13 | GPIO14 | GPIO15 |\
  50                                                 GPIO16
  51         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
  52         #define CONFIG_QCA_GPIO_MASK_IN         GPIO12 | GPIO17
  53         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
  54
  55 #elif defined(CONFIG_FOR_WALLYS_DR531)
  56
  57         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO11 | GPIO12 | GPIO13 |\
  58                                                 GPIO14 | GPIO15 | GPIO16
  59         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
  60         #define CONFIG_QCA_GPIO_MASK_IN         GPIO17
  61         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
  62
  63 #elif defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
  64
  65         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO4  | GPIO11 | GPIO12 |\
  66                                                 GPIO13 | GPIO14 | GPIO15 |\
  67                                                 GPIO16
  68         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
  69         #define CONFIG_QCA_GPIO_MASK_IN         GPIO17
  70         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
  71
  72 #endif
  73
  74 /*
  75  * ================
  76  * Default bootargs
  77  * ================
  78  */
  79 #if defined(CONFIG_FOR_COMFAST_CF_E320N_V2)
  80
  81         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:03 "\
  82                                 "rootfstype=jffs2 init=/sbin/init "\
  83                                 "mtdparts=ath-nor0:64k(u-boot),64k(art),1536k(uImage),14656k(rootfs),64k(mib0)"
  84
  85 #elif defined(CONFIG_FOR_COMFAST_CF_E520N)
  86
  87         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:03 "\
  88                                 "rootfstype=jffs2 init=/sbin/init "\
  89                                 "mtdparts=ath-nor0:64k(u-boot),64k(art),1536k(uImage),6464k(rootfs),64k(mib0)"
  90
  91 #elif defined(CONFIG_FOR_TPLINK_WR820N_CN)
  92
  93         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
  94                                 "rootfstype=squashfs init=/sbin/init "\
  95                                 "mtdparts=ath-nor0:32k(u-boot1),32k(u-boot2),3008k(rootfs),896k(uImage),64k(mib0),64k(art)"
  96
  97 #elif defined(CONFIG_FOR_TPLINK_WR841N_V9) ||\
  98       defined(CONFIG_FOR_TPLINK_WR802N)
  99
 100         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 101                                 "rootfstype=squashfs init=/sbin/init "\
 102                                 "mtdparts=ath-nor0:128k(u-boot),1024k(kernel),2816k(rootfs),64k(config),64k(art)"
 103
 104 #elif defined(CONFIG_FOR_WALLYS_DR531)
 105
 106         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 107                                 "rootfstype=jffs2 init=/sbin/init "\
 108                                 "mtdparts=ath-nor0:256k(u-boot),64k(u-boot-env),6336k(rootfs),1408k"
 109
 110 #elif defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 111
 112         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 113                                 "rootfstype=squashfs init=/sbin/init "\
 114                                 "mtdparts=spi0.0:256k(u-boot),64k(u-boot-env),14528k(rootfs),1472k(kernel),64k(art),16000k(firmware)"
 115
 116 #endif
 117
 118 /*
 119  * =============================
 120  * Load address and boot command
 121  * =============================
 122  */
 123 #if defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 124     defined(CONFIG_FOR_COMFAST_CF_E520N)    ||\
 125     defined(CONFIG_FOR_TPLINK_WR820N_CN)    ||\
 126     defined(CONFIG_FOR_TPLINK_WR802N)       ||\
 127     defined(CONFIG_FOR_TPLINK_WR841N_V9)
 128         #define CFG_LOAD_ADDR   0x9F020000
 129 #elif defined(CONFIG_FOR_WALLYS_DR531)
 130         #define CFG_LOAD_ADDR   0x9F050000
 131 #elif defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 132         #define CFG_LOAD_ADDR   0x9FE80000
 133 #endif
 134
 135 #define CONFIG_BOOTCOMMAND      "bootm " MK_STR(CFG_LOAD_ADDR)
 136
 137 /*
 138  * =========================
 139  * Environment configuration
 140  * =========================
 141  */
 142 #if defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 143     defined(CONFIG_FOR_COMFAST_CF_E520N)
 144         #define CFG_ENV_ADDR            0x9F018000
 145         #define CFG_ENV_SIZE            0x7C00
 146         #define CFG_ENV_SECT_SIZE       0x10000
 147 #elif defined(CONFIG_FOR_TPLINK_WR820N_CN) ||\
 148       defined(CONFIG_FOR_TPLINK_WR802N)    ||\
 149       defined(CONFIG_FOR_TPLINK_WR841N_V9)
 150         #define CFG_ENV_ADDR            0x9F01EC00
 151         #define CFG_ENV_SIZE            0x1000
 152         #define CFG_ENV_SECT_SIZE       0x10000
 153 #elif defined(CONFIG_FOR_WALLYS_DR531)
 154         #define CFG_ENV_ADDR            0x9F030000
 155         #define CFG_ENV_SIZE            0xF800
 156         #define CFG_ENV_SECT_SIZE       0x10000
 157 #elif defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 158         #define CFG_ENV_ADDR            0x9F040000
 159         #define CFG_ENV_SIZE            0xFC00
 160         #define CFG_ENV_SECT_SIZE       0x10000
 161 #endif
 162
 163 /*
 164  * ===========================
 165  * List of available baudrates
 166  * ===========================
 167  */
 168 #define CFG_BAUDRATE_TABLE      \
 169                 { 600,    1200,   2400,    4800,    9600,    14400, \
 170                   19200,  28800,  38400,   56000,   57600,   115200 }
 171
 172 /*
 173  * ==================================================
 174  * MAC address/es, model and WPS pin offsets in FLASH
 175  * ==================================================
 176  */
 177 #if defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 178     defined(CONFIG_FOR_COMFAST_CF_E520N)
 179         #define OFFSET_MAC_DATA_BLOCK           0x10000
 180         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x10000
 181         #define OFFSET_MAC_ADDRESS              0x00000
 182 #elif defined(CONFIG_FOR_TPLINK_WR820N_CN) ||\
 183       defined(CONFIG_FOR_TPLINK_WR802N)    ||\
 184       defined(CONFIG_FOR_TPLINK_WR841N_V9)
 185         #define OFFSET_MAC_DATA_BLOCK           0x010000
 186         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x010000
 187         #define OFFSET_MAC_ADDRESS              0x00FC00
 188         #define OFFSET_ROUTER_MODEL             0x00FD00
 189         #define OFFSET_PIN_NUMBER               0x00FE00
 190 #elif defined(CONFIG_FOR_WALLYS_DR531)
 191         #define OFFSET_MAC_DATA_BLOCK           0x030000
 192         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x010000
 193         #define OFFSET_MAC_ADDRESS              0x00F810
 194 #elif defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 195         #define OFFSET_MAC_DATA_BLOCK           0xFF0000
 196         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x010000
 197         #define OFFSET_MAC_ADDRESS              0x000000
 198 #endif
 199
 200 /*
 201  * =========================
 202  * Custom changes per device
 203  * =========================
 204  */
 205
 206 /*
 207  * Comfast CF-E520N and E320Nv2 are limited to 64 KB only,
 208  * disable some commands
 209  */
 210 #if defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 211     defined(CONFIG_FOR_COMFAST_CF_E520N)
 212         #undef CONFIG_CMD_DHCP
 213         #undef CONFIG_CMD_LOADB
 214         #undef CONFIG_CMD_SNTP
 215 #endif
 216
 217 /*
 218  * ===========================
 219  * HTTP recovery configuration
 220  * ===========================
 221  */
 222 #if defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 223         #define WEBFAILSAFE_UPLOAD_KERNEL_ADDRESS       CFG_FLASH_BASE + 0x50000
 224 #else
 225         #define WEBFAILSAFE_UPLOAD_KERNEL_ADDRESS       CFG_LOAD_ADDR
 226 #endif
 227
 228 /* Firmware size limit */
 229 #if defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 230     defined(CONFIG_FOR_COMFAST_CF_E520N)    ||\
 231     defined(CONFIG_FOR_TPLINK_WR820N_CN)    ||\
 232     defined(CONFIG_FOR_TPLINK_WR802N)       ||\
 233     defined(CONFIG_FOR_TPLINK_WR841N_V9)
 234         #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (192 * 1024)
 235 #elif defined(CONFIG_FOR_WALLYS_DR531) ||\
 236       defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 237         #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (384 * 1024)
 238 #endif
 239
 240 /*
 241  * ========================
 242  * PLL/Clocks configuration
 243  * ========================
 244  */
 245 #if defined(CONFIG_FOR_TPLINK_WR820N_CN) ||\
 246     defined(CONFIG_FOR_TPLINK_WR802N)    ||\
 247     defined(CONFIG_FOR_TPLINK_WR841N_V9)
 248         #define CONFIG_QCA_PLL  QCA_PLL_PRESET_550_400_200
 249 #elif defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 250       defined(CONFIG_FOR_COMFAST_CF_E520N)    ||\
 251       defined(CONFIG_FOR_WALLYS_DR531)        ||\
 252       defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 253         #define CONFIG_QCA_PLL  QCA_PLL_PRESET_650_400_200
 254 #endif
 255
 256 #if defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 257     defined(CONFIG_FOR_COMFAST_CF_E520N)    ||\
 258     defined(CONFIG_FOR_TPLINK_WR820N_CN)    ||\
 259     defined(CONFIG_FOR_TPLINK_WR802N)       ||\
 260     defined(CONFIG_FOR_TPLINK_WR841N_V9)
 261
 262         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET    0x10000
 263         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE      0x10000
 264
 265 #elif defined(CONFIG_FOR_WALLYS_DR531)
 266
 267         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET    0x30000
 268         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE      0x10000
 269
 270 #elif defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 271
 272         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET    0x40000
 273         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE      0x10000
 274
 275 #endif
 276
 277 /*
 278  * ==================================
 279  * For upgrade scripts in environment
 280  * ==================================
 281  */
 282 #if !defined(CONFIG_FOR_COMFAST_CF_E320N_V2) &&\
 283     !defined(CONFIG_FOR_COMFAST_CF_E520N)    &&\
 284     !defined(CONFIG_FOR_WALLYS_DR531)        &&\
 285     !defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 286         #define CONFIG_UPG_UBOOT_SIZE_BACKUP_HEX        0x20000
 287 #endif
 288
 289 #if defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 290         #define CONFIG_UPG_SCRIPTS_FW_ADDR_HEX  0x9F050000
 291 #endif
 292
 293 /*
 294  * ===================
 295  * Other configuration
 296  * ===================
 297  */
 298
 299 /* Cache lock for stack */
 300 #define CONFIG_INIT_SRAM_SP_OFFSET      0xbd001800
 301
 302 #endif /* _AP143_H */