u-boot/include/configs/ap143.h

   1 /*
   2  * Copyright (C) 2016 Piotr Dymacz <piotr@dymacz.pl>
   3  *
   4  * This file contains the configuration parameters
   5  * for Qualcomm Atheros QCA953x based devices
   6  *
   7  * Reference designs: AP143
   8  *
   9  * SPDX-License-Identifier: GPL-2.0
  10  */
  11
  12 #ifndef _AP143_H
  13 #define _AP143_H
  14
  15 #include <config.h>
  16 #include <configs/qca9k_common.h>
  17 #include <soc/soc_common.h>
  18
  19 /*
  20  * ==================
  21  * GPIO configuration
  22  * ==================
  23  */
  24 #if defined(CONFIG_FOR_COMFAST_CF_E314N)
  25
  26         #define CONFIG_QCA_GPIO_MASK_LED_ACT_H  GPIO4  | GPIO11 | GPIO14 |\
  27                                                 GPIO15 | GPIO16
  28         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO0 | GPIO2 | GPIO3
  29         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_H |\
  30                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_L
  31         #define CONFIG_QCA_GPIO_MASK_IN         GPIO17
  32         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
  33         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_L CONFIG_QCA_GPIO_MASK_LED_ACT_H
  34
  35 #elif defined(CONFIG_FOR_COMFAST_CF_E320N_V2)
  36
  37         #define CONFIG_QCA_GPIO_MASK_LED_ACT_H  GPIO0 | GPIO2 | GPIO3
  38         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_H
  39         #define CONFIG_QCA_GPIO_MASK_IN         GPIO11 | GPIO12 | GPIO14 |\
  40                                                 GPIO16 | GPIO17
  41         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_L CONFIG_QCA_GPIO_MASK_LED_ACT_H
  42
  43 #elif defined(CONFIG_FOR_COMFAST_CF_E520N) ||\
  44       defined(CONFIG_FOR_COMFAST_CF_E530N)
  45
  46         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO11
  47         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
  48         #define CONFIG_QCA_GPIO_MASK_IN         GPIO17
  49         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
  50
  51 #elif defined(CONFIG_FOR_TPLINK_WR810N)
  52
  53         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO13
  54         #define CONFIG_QCA_GPIO_MASK_OUT        GPIO11 |\
  55                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_L
  56         #define CONFIG_QCA_GPIO_MASK_IN         GPIO0 | GPIO1 | GPIO12
  57         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H GPIO11 |\
  58                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_L
  59
  60 #elif defined(CONFIG_FOR_TPLINK_WR820N_CN) ||\
  61       defined(CONFIG_FOR_TPLINK_WR802N)
  62
  63         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO13
  64         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
  65         #define CONFIG_QCA_GPIO_MASK_IN         GPIO12
  66         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
  67
  68 #elif defined(CONFIG_FOR_TPLINK_WR841N_V10) ||\
  69       defined(CONFIG_FOR_TPLINK_WR841N_V9)
  70
  71         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO3  | GPIO4  | GPIO11 |\
  72                                                 GPIO13 | GPIO14 | GPIO15 |\
  73                                                 GPIO16
  74         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
  75         #define CONFIG_QCA_GPIO_MASK_IN         GPIO12 | GPIO17
  76         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
  77
  78 #elif defined(CONFIG_FOR_TPLINK_WR841N_V11)
  79
  80         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO1  | GPIO2  | GPIO3  |\
  81                                                 GPIO4  | GPIO11 | GPIO13 |\
  82                                                 GPIO14 | GPIO15 | GPIO16
  83         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
  84         #define CONFIG_QCA_GPIO_MASK_IN         GPIO12 | GPIO17
  85         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
  86
  87 #elif defined(CONFIG_FOR_WALLYS_DR531)
  88
  89         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO11 | GPIO12 | GPIO13 |\
  90                                                 GPIO14 | GPIO15 | GPIO16
  91         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
  92         #define CONFIG_QCA_GPIO_MASK_IN         GPIO17
  93         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
  94
  95 #elif defined(CONFIG_FOR_YUNCORE_AP90Q)
  96
  97         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO4 | GPIO12 | GPIO16
  98         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
  99         #define CONFIG_QCA_GPIO_MASK_IN         GPIO17
 100         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
 101
 102 #elif defined(CONFIG_FOR_YUNCORE_CPE830)
 103
 104         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO0 | GPIO1 | GPIO2  |\
 105                                                 GPIO3 | GPIO4 | GPIO12 |\
 106                                                 GPIO16
 107         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
 108         #define CONFIG_QCA_GPIO_MASK_IN         GPIO17
 109         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
 110
 111 #elif defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 112
 113         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO4  | GPIO11 | GPIO12 |\
 114                                                 GPIO13 | GPIO14 | GPIO15 |\
 115                                                 GPIO16
 116         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
 117         #define CONFIG_QCA_GPIO_MASK_IN         GPIO17
 118         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
 119
 120 #endif
 121
 122 /*
 123  * ================
 124  * Default bootargs
 125  * ================
 126  */
 127 #if defined(CONFIG_FOR_COMFAST_CF_E314N) ||\
 128     defined(CONFIG_FOR_COMFAST_CF_E320N_V2)
 129
 130         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:03 "\
 131                                 "rootfstype=jffs2 init=/sbin/init "\
 132                                 "mtdparts=ath-nor0:64k(u-boot),64k(art),1536k(uImage),14656k(rootfs),64k(mib0)"
 133
 134 #elif defined(CONFIG_FOR_COMFAST_CF_E520N) ||\
 135       defined(CONFIG_FOR_COMFAST_CF_E530N)
 136
 137         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:03 "\
 138                                 "rootfstype=jffs2 init=/sbin/init "\
 139                                 "mtdparts=ath-nor0:64k(u-boot),64k(art),1536k(uImage),6464k(rootfs),64k(mib0)"
 140
 141 #elif defined(CONFIG_FOR_TPLINK_WR810N)
 142
 143         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 144                                 "rootfstype=squashfs init=/sbin/init "\
 145                                 "mtdparts=ath-nor0:128k(u-boot),1024k(kernel),6912k(rootfs),64k(config),64k(art)"
 146
 147 #elif defined(CONFIG_FOR_TPLINK_WR820N_CN)
 148
 149         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 150                                 "rootfstype=squashfs init=/sbin/init "\
 151                                 "mtdparts=ath-nor0:32k(u-boot1),32k(u-boot2),3008k(rootfs),896k(uImage),64k(mib0),64k(art)"
 152
 153 #elif defined(CONFIG_FOR_TPLINK_WR841N_V10) ||\
 154       defined(CONFIG_FOR_TPLINK_WR841N_V11) ||\
 155       defined(CONFIG_FOR_TPLINK_WR841N_V9)  ||\
 156       defined(CONFIG_FOR_TPLINK_WR802N)
 157
 158         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 159                                 "rootfstype=squashfs init=/sbin/init "\
 160                                 "mtdparts=ath-nor0:128k(u-boot),1024k(kernel),2816k(rootfs),64k(config),64k(art)"
 161
 162 #elif defined(CONFIG_FOR_WALLYS_DR531)
 163
 164         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 165                                 "rootfstype=jffs2 init=/sbin/init "\
 166                                 "mtdparts=ath-nor0:256k(u-boot),64k(u-boot-env),6336k(rootfs),1408k"
 167
 168 #elif defined(CONFIG_FOR_YUNCORE_AP90Q)  ||\
 169       defined(CONFIG_FOR_YUNCORE_CPE830) ||\
 170       defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 171
 172         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 173                                 "rootfstype=squashfs init=/sbin/init "\
 174                                 "mtdparts=spi0.0:256k(u-boot),64k(u-boot-env),14528k(rootfs),1472k(kernel),64k(art),16000k(firmware)"
 175
 176 #endif
 177
 178 /*
 179  * =============================
 180  * Load address and boot command
 181  * =============================
 182  */
 183 #if defined(CONFIG_FOR_COMFAST_CF_E314N)    ||\
 184     defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 185     defined(CONFIG_FOR_COMFAST_CF_E520N)    ||\
 186     defined(CONFIG_FOR_COMFAST_CF_E530N)    ||\
 187     defined(CONFIG_FOR_TPLINK_WR802N)       ||\
 188     defined(CONFIG_FOR_TPLINK_WR810N)       ||\
 189     defined(CONFIG_FOR_TPLINK_WR820N_CN)    ||\
 190     defined(CONFIG_FOR_TPLINK_WR841N_V10)   ||\
 191     defined(CONFIG_FOR_TPLINK_WR841N_V11)   ||\
 192     defined(CONFIG_FOR_TPLINK_WR841N_V9)
 193         #define CFG_LOAD_ADDR   0x9F020000
 194 #elif defined(CONFIG_FOR_WALLYS_DR531)   ||\
 195       defined(CONFIG_FOR_YUNCORE_AP90Q)  ||\
 196       defined(CONFIG_FOR_YUNCORE_CPE830) ||\
 197       defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 198         #define CFG_LOAD_ADDR   0x9F050000
 199 #endif
 200
 201 #if defined(CONFIG_FOR_YUNCORE_AP90Q)  ||\
 202     defined(CONFIG_FOR_YUNCORE_CPE830) ||\
 203     defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 204         #define CONFIG_BOOTCOMMAND      "bootm 0x9FE80000 || bootm 0x9F050000"
 205 #else
 206         #define CONFIG_BOOTCOMMAND      "bootm " MK_STR(CFG_LOAD_ADDR)
 207 #endif
 208
 209 /*
 210  * =========================
 211  * Environment configuration
 212  * =========================
 213  */
 214 #if defined(CONFIG_FOR_COMFAST_CF_E314N)    ||\
 215     defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 216     defined(CONFIG_FOR_COMFAST_CF_E520N)    ||\
 217     defined(CONFIG_FOR_COMFAST_CF_E530N)
 218         #define CFG_ENV_ADDR            0x9F018000
 219         #define CFG_ENV_SIZE            0x7C00
 220         #define CFG_ENV_SECT_SIZE       0x10000
 221 #elif defined(CONFIG_FOR_TPLINK_WR802N)     ||\
 222       defined(CONFIG_FOR_TPLINK_WR810N)     ||\
 223       defined(CONFIG_FOR_TPLINK_WR820N_CN)  ||\
 224       defined(CONFIG_FOR_TPLINK_WR841N_V10) ||\
 225       defined(CONFIG_FOR_TPLINK_WR841N_V11) ||\
 226       defined(CONFIG_FOR_TPLINK_WR841N_V9)
 227         #define CFG_ENV_ADDR            0x9F01EC00
 228         #define CFG_ENV_SIZE            0x1000
 229         #define CFG_ENV_SECT_SIZE       0x10000
 230 #elif defined(CONFIG_FOR_WALLYS_DR531)
 231         #define CFG_ENV_ADDR            0x9F030000
 232         #define CFG_ENV_SIZE            0xF800
 233         #define CFG_ENV_SECT_SIZE       0x10000
 234 #elif defined(CONFIG_FOR_YUNCORE_AP90Q)  ||\
 235       defined(CONFIG_FOR_YUNCORE_CPE830) ||\
 236       defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 237         #define CFG_ENV_ADDR            0x9F040000
 238         #define CFG_ENV_SIZE            0xFC00
 239         #define CFG_ENV_SECT_SIZE       0x10000
 240 #endif
 241
 242 /*
 243  * ===========================
 244  * List of available baudrates
 245  * ===========================
 246  */
 247 #define CFG_BAUDRATE_TABLE      \
 248                 { 600,    1200,   2400,    4800,    9600,    14400, \
 249                   19200,  28800,  38400,   56000,   57600,   115200 }
 250
 251 /*
 252  * ==================================================
 253  * MAC address/es, model and WPS pin offsets in FLASH
 254  * ==================================================
 255  */
 256 #if defined(CONFIG_FOR_COMFAST_CF_E314N)    ||\
 257     defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 258     defined(CONFIG_FOR_COMFAST_CF_E520N)    ||\
 259     defined(CONFIG_FOR_COMFAST_CF_E530N)
 260         #define OFFSET_MAC_DATA_BLOCK           0x10000
 261         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x10000
 262         #define OFFSET_MAC_ADDRESS              0x00000
 263 #elif defined(CONFIG_FOR_TPLINK_WR802N)     ||\
 264       defined(CONFIG_FOR_TPLINK_WR810N)     ||\
 265       defined(CONFIG_FOR_TPLINK_WR820N_CN)  ||\
 266       defined(CONFIG_FOR_TPLINK_WR841N_V10) ||\
 267       defined(CONFIG_FOR_TPLINK_WR841N_V11) ||\
 268       defined(CONFIG_FOR_TPLINK_WR841N_V9)
 269         #define OFFSET_MAC_DATA_BLOCK           0x010000
 270         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x010000
 271         #define OFFSET_MAC_ADDRESS              0x00FC00
 272         #define OFFSET_ROUTER_MODEL             0x00FD00
 273         #define OFFSET_PIN_NUMBER               0x00FE00
 274 #elif defined(CONFIG_FOR_WALLYS_DR531)
 275         #define OFFSET_MAC_DATA_BLOCK           0x030000
 276         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x010000
 277         #define OFFSET_MAC_ADDRESS              0x00F810
 278 #elif defined(CONFIG_FOR_YUNCORE_AP90Q)  ||\
 279       defined(CONFIG_FOR_YUNCORE_CPE830) ||\
 280       defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 281         #define OFFSET_MAC_DATA_BLOCK           0xFF0000
 282         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x010000
 283         #define OFFSET_MAC_ADDRESS              0x000000
 284 #endif
 285
 286 /*
 287  * =========================
 288  * Custom changes per device
 289  * =========================
 290  */
 291
 292 /*
 293  * Comfast CF-E520N and E320Nv2 are limited to 64 KB only,
 294  * disable some commands
 295  */
 296 #if defined(CONFIG_FOR_COMFAST_CF_E314N)    ||\
 297     defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 298     defined(CONFIG_FOR_COMFAST_CF_E520N)    ||\
 299     defined(CONFIG_FOR_COMFAST_CF_E530N)
 300         #undef CONFIG_CMD_DHCP
 301         #undef CONFIG_CMD_LOADB
 302         #undef CONFIG_CMD_SNTP
 303 #endif
 304
 305 /*
 306  * ===========================
 307  * HTTP recovery configuration
 308  * ===========================
 309  */
 310 #define WEBFAILSAFE_UPLOAD_KERNEL_ADDRESS       CFG_LOAD_ADDR
 311
 312 #if defined(CONFIG_FOR_COMFAST_CF_E314N)    ||\
 313     defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 314     defined(CONFIG_FOR_COMFAST_CF_E520N)    ||\
 315     defined(CONFIG_FOR_COMFAST_CF_E530N)
 316         #define WEBFAILSAFE_UPLOAD_ART_ADDRESS  (CFG_FLASH_BASE + 0x10000)
 317 #endif
 318
 319 /* Firmware size limit */
 320 #if defined(CONFIG_FOR_COMFAST_CF_E314N)    ||\
 321     defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 322     defined(CONFIG_FOR_COMFAST_CF_E520N)    ||\
 323     defined(CONFIG_FOR_COMFAST_CF_E530N)    ||\
 324     defined(CONFIG_FOR_TPLINK_WR802N)       ||\
 325     defined(CONFIG_FOR_TPLINK_WR810N)       ||\
 326     defined(CONFIG_FOR_TPLINK_WR820N_CN)    ||\
 327     defined(CONFIG_FOR_TPLINK_WR841N_V10)   ||\
 328     defined(CONFIG_FOR_TPLINK_WR841N_V11)   ||\
 329     defined(CONFIG_FOR_TPLINK_WR841N_V9)
 330         #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (192 * 1024)
 331 #elif defined(CONFIG_FOR_WALLYS_DR531)   ||\
 332       defined(CONFIG_FOR_YUNCORE_AP90Q)  ||\
 333       defined(CONFIG_FOR_YUNCORE_CPE830) ||\
 334       defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 335         #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (384 * 1024)
 336 #endif
 337
 338 /*
 339  * ========================
 340  * PLL/Clocks configuration
 341  * ========================
 342  */
 343 #if defined(CONFIG_FOR_TPLINK_WR802N)    ||\
 344     defined(CONFIG_FOR_TPLINK_WR820N_CN) ||\
 345     defined(CONFIG_FOR_TPLINK_WR841N_V9)
 346         #define CONFIG_QCA_PLL  QCA_PLL_PRESET_550_400_200
 347 #else
 348         #define CONFIG_QCA_PLL  QCA_PLL_PRESET_650_400_200
 349 #endif
 350
 351 #if defined(CONFIG_FOR_COMFAST_CF_E314N)    ||\
 352     defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 353     defined(CONFIG_FOR_COMFAST_CF_E520N)    ||\
 354     defined(CONFIG_FOR_COMFAST_CF_E530N)    ||\
 355     defined(CONFIG_FOR_TPLINK_WR802N)       ||\
 356     defined(CONFIG_FOR_TPLINK_WR810N)       ||\
 357     defined(CONFIG_FOR_TPLINK_WR820N_CN)    ||\
 358     defined(CONFIG_FOR_TPLINK_WR841N_V10)   ||\
 359     defined(CONFIG_FOR_TPLINK_WR841N_V11)   ||\
 360     defined(CONFIG_FOR_TPLINK_WR841N_V9)
 361
 362         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET    0x10000
 363         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE      0x10000
 364
 365 #elif defined(CONFIG_FOR_WALLYS_DR531)
 366
 367         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET    0x30000
 368         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE      0x10000
 369
 370 #elif defined(CONFIG_FOR_YUNCORE_AP90Q)  ||\
 371       defined(CONFIG_FOR_YUNCORE_CPE830) ||\
 372       defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 373
 374         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET    0x40000
 375         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE      0x10000
 376
 377 #endif
 378
 379 /*
 380  * ==================================
 381  * For upgrade scripts in environment
 382  * ==================================
 383  */
 384 #if !defined(CONFIG_FOR_COMFAST_CF_E314N)    &&\
 385     !defined(CONFIG_FOR_COMFAST_CF_E320N_V2) &&\
 386     !defined(CONFIG_FOR_COMFAST_CF_E520N)    &&\
 387     !defined(CONFIG_FOR_COMFAST_CF_E530N)    &&\
 388     !defined(CONFIG_FOR_WALLYS_DR531)        &&\
 389     !defined(CONFIG_FOR_YUNCORE_AP90Q)       &&\
 390     !defined(CONFIG_FOR_YUNCORE_CPE830)      &&\
 391     !defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 392         #define CONFIG_UPG_UBOOT_SIZE_BACKUP_HEX        0x20000
 393 #endif
 394
 395 #if defined(CONFIG_FOR_YUNCORE_AP90Q)  ||\
 396     defined(CONFIG_FOR_YUNCORE_CPE830) ||\
 397     defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 398         #define CONFIG_UPG_SCRIPTS_FW_ADDR_HEX  0x9F050000
 399 #endif
 400
 401 /*
 402  * ===================
 403  * Other configuration
 404  * ===================
 405  */
 406
 407 /* Cache lock for stack */
 408 #define CONFIG_INIT_SRAM_SP_OFFSET      0xbd001800
 409
 410 #endif /* _AP143_H */