u-boot/include/configs/ap143.h

   1 /*
   2  * Copyright (C) 2016 Piotr Dymacz <piotr@dymacz.pl>
   3  *
   4  * This file contains the configuration parameters
   5  * for Qualcomm Atheros QCA953x based devices
   6  *
   7  * Reference designs: AP143
   8  *
   9  * SPDX-License-Identifier: GPL-2.0
  10  */
  11
  12 #ifndef _AP143_H
  13 #define _AP143_H
  14
  15 #include <config.h>
  16 #include <configs/qca9k_common.h>
  17 #include <soc/soc_common.h>
  18
  19 /*
  20  * ==================
  21  * GPIO configuration
  22  * ==================
  23  */
  24 #if defined(CONFIG_FOR_COMFAST_CF_E314N)
  25
  26         #define CONFIG_QCA_GPIO_MASK_LED_ACT_H  GPIO4  | GPIO11 | GPIO14 |\
  27                                                 GPIO15 | GPIO16
  28         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO0 | GPIO2 | GPIO3
  29         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_H |\
  30                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_L
  31         #define CONFIG_QCA_GPIO_MASK_IN         GPIO17
  32         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
  33         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_L CONFIG_QCA_GPIO_MASK_LED_ACT_H
  34
  35 #elif defined(CONFIG_FOR_COMFAST_CF_E320N_V2)
  36
  37         #define CONFIG_QCA_GPIO_MASK_LED_ACT_H  GPIO0 | GPIO2 | GPIO3
  38         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_H
  39         #define CONFIG_QCA_GPIO_MASK_IN         GPIO17
  40         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_L CONFIG_QCA_GPIO_MASK_LED_ACT_H
  41
  42 #elif defined(CONFIG_FOR_COMFAST_CF_E520N) ||\
  43       defined(CONFIG_FOR_COMFAST_CF_E530N)
  44
  45         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO11
  46         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
  47         #define CONFIG_QCA_GPIO_MASK_IN         GPIO17
  48         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
  49
  50 #elif defined(CONFIG_FOR_TPLINK_WR820N_CN) ||\
  51       defined(CONFIG_FOR_TPLINK_WR802N)
  52
  53         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO13
  54         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
  55         #define CONFIG_QCA_GPIO_MASK_IN         GPIO12
  56         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
  57
  58 #elif defined(CONFIG_FOR_TPLINK_WR841N_V9)
  59
  60         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO3  | GPIO4  | GPIO11 |\
  61                                                 GPIO13 | GPIO14 | GPIO15 |\
  62                                                 GPIO16
  63         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
  64         #define CONFIG_QCA_GPIO_MASK_IN         GPIO12 | GPIO17
  65         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
  66
  67 #elif defined(CONFIG_FOR_WALLYS_DR531)
  68
  69         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO11 | GPIO12 | GPIO13 |\
  70                                                 GPIO14 | GPIO15 | GPIO16
  71         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
  72         #define CONFIG_QCA_GPIO_MASK_IN         GPIO17
  73         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
  74
  75 #elif defined(CONFIG_FOR_YUNCORE_AP90Q)
  76
  77         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO4 | GPIO12 | GPIO16
  78         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
  79         #define CONFIG_QCA_GPIO_MASK_IN         GPIO17
  80         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
  81
  82 #elif defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
  83
  84         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO4  | GPIO11 | GPIO12 |\
  85                                                 GPIO13 | GPIO14 | GPIO15 |\
  86                                                 GPIO16
  87         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
  88         #define CONFIG_QCA_GPIO_MASK_IN         GPIO17
  89         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
  90
  91 #endif
  92
  93 /*
  94  * ================
  95  * Default bootargs
  96  * ================
  97  */
  98 #if defined(CONFIG_FOR_COMFAST_CF_E314N) ||\
  99     defined(CONFIG_FOR_COMFAST_CF_E320N_V2)
 100
 101         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:03 "\
 102                                 "rootfstype=jffs2 init=/sbin/init "\
 103                                 "mtdparts=ath-nor0:64k(u-boot),64k(art),1536k(uImage),14656k(rootfs),64k(mib0)"
 104
 105 #elif defined(CONFIG_FOR_COMFAST_CF_E520N) ||\
 106       defined(CONFIG_FOR_COMFAST_CF_E530N)
 107
 108         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:03 "\
 109                                 "rootfstype=jffs2 init=/sbin/init "\
 110                                 "mtdparts=ath-nor0:64k(u-boot),64k(art),1536k(uImage),6464k(rootfs),64k(mib0)"
 111
 112 #elif defined(CONFIG_FOR_TPLINK_WR820N_CN)
 113
 114         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 115                                 "rootfstype=squashfs init=/sbin/init "\
 116                                 "mtdparts=ath-nor0:32k(u-boot1),32k(u-boot2),3008k(rootfs),896k(uImage),64k(mib0),64k(art)"
 117
 118 #elif defined(CONFIG_FOR_TPLINK_WR841N_V9) ||\
 119       defined(CONFIG_FOR_TPLINK_WR802N)
 120
 121         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 122                                 "rootfstype=squashfs init=/sbin/init "\
 123                                 "mtdparts=ath-nor0:128k(u-boot),1024k(kernel),2816k(rootfs),64k(config),64k(art)"
 124
 125 #elif defined(CONFIG_FOR_WALLYS_DR531)
 126
 127         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 128                                 "rootfstype=jffs2 init=/sbin/init "\
 129                                 "mtdparts=ath-nor0:256k(u-boot),64k(u-boot-env),6336k(rootfs),1408k"
 130
 131 #elif defined(CONFIG_FOR_YUNCORE_AP90Q) ||\
 132       defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 133
 134         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 135                                 "rootfstype=squashfs init=/sbin/init "\
 136                                 "mtdparts=spi0.0:256k(u-boot),64k(u-boot-env),14528k(rootfs),1472k(kernel),64k(art),16000k(firmware)"
 137
 138 #endif
 139
 140 /*
 141  * =============================
 142  * Load address and boot command
 143  * =============================
 144  */
 145 #if defined(CONFIG_FOR_COMFAST_CF_E314N)    ||\
 146     defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 147     defined(CONFIG_FOR_COMFAST_CF_E520N)    ||\
 148     defined(CONFIG_FOR_COMFAST_CF_E530N)    ||\
 149     defined(CONFIG_FOR_TPLINK_WR820N_CN)    ||\
 150     defined(CONFIG_FOR_TPLINK_WR802N)       ||\
 151     defined(CONFIG_FOR_TPLINK_WR841N_V9)
 152         #define CFG_LOAD_ADDR   0x9F020000
 153 #elif defined(CONFIG_FOR_WALLYS_DR531)
 154         #define CFG_LOAD_ADDR   0x9F050000
 155 #elif defined(CONFIG_FOR_YUNCORE_AP90Q) ||\
 156       defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 157         #define CFG_LOAD_ADDR   0x9FE80000
 158 #endif
 159
 160 #define CONFIG_BOOTCOMMAND      "bootm " MK_STR(CFG_LOAD_ADDR)
 161
 162 /*
 163  * =========================
 164  * Environment configuration
 165  * =========================
 166  */
 167 #if defined(CONFIG_FOR_COMFAST_CF_E314N)    ||\
 168     defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 169     defined(CONFIG_FOR_COMFAST_CF_E520N)    ||\
 170     defined(CONFIG_FOR_COMFAST_CF_E530N)
 171         #define CFG_ENV_ADDR            0x9F018000
 172         #define CFG_ENV_SIZE            0x7C00
 173         #define CFG_ENV_SECT_SIZE       0x10000
 174 #elif defined(CONFIG_FOR_TPLINK_WR820N_CN) ||\
 175       defined(CONFIG_FOR_TPLINK_WR802N)    ||\
 176       defined(CONFIG_FOR_TPLINK_WR841N_V9)
 177         #define CFG_ENV_ADDR            0x9F01EC00
 178         #define CFG_ENV_SIZE            0x1000
 179         #define CFG_ENV_SECT_SIZE       0x10000
 180 #elif defined(CONFIG_FOR_WALLYS_DR531)
 181         #define CFG_ENV_ADDR            0x9F030000
 182         #define CFG_ENV_SIZE            0xF800
 183         #define CFG_ENV_SECT_SIZE       0x10000
 184 #elif defined(CONFIG_FOR_YUNCORE_AP90Q) ||\
 185       defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 186         #define CFG_ENV_ADDR            0x9F040000
 187         #define CFG_ENV_SIZE            0xFC00
 188         #define CFG_ENV_SECT_SIZE       0x10000
 189 #endif
 190
 191 /*
 192  * ===========================
 193  * List of available baudrates
 194  * ===========================
 195  */
 196 #define CFG_BAUDRATE_TABLE      \
 197                 { 600,    1200,   2400,    4800,    9600,    14400, \
 198                   19200,  28800,  38400,   56000,   57600,   115200 }
 199
 200 /*
 201  * ==================================================
 202  * MAC address/es, model and WPS pin offsets in FLASH
 203  * ==================================================
 204  */
 205 #if defined(CONFIG_FOR_COMFAST_CF_E314N)    ||\
 206     defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 207     defined(CONFIG_FOR_COMFAST_CF_E520N)    ||\
 208     defined(CONFIG_FOR_COMFAST_CF_E530N)
 209         #define OFFSET_MAC_DATA_BLOCK           0x10000
 210         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x10000
 211         #define OFFSET_MAC_ADDRESS              0x00000
 212 #elif defined(CONFIG_FOR_TPLINK_WR820N_CN) ||\
 213       defined(CONFIG_FOR_TPLINK_WR802N)    ||\
 214       defined(CONFIG_FOR_TPLINK_WR841N_V9)
 215         #define OFFSET_MAC_DATA_BLOCK           0x010000
 216         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x010000
 217         #define OFFSET_MAC_ADDRESS              0x00FC00
 218         #define OFFSET_ROUTER_MODEL             0x00FD00
 219         #define OFFSET_PIN_NUMBER               0x00FE00
 220 #elif defined(CONFIG_FOR_WALLYS_DR531)
 221         #define OFFSET_MAC_DATA_BLOCK           0x030000
 222         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x010000
 223         #define OFFSET_MAC_ADDRESS              0x00F810
 224 #elif defined(CONFIG_FOR_YUNCORE_AP90Q) ||\
 225       defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 226         #define OFFSET_MAC_DATA_BLOCK           0xFF0000
 227         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x010000
 228         #define OFFSET_MAC_ADDRESS              0x000000
 229 #endif
 230
 231 /*
 232  * =========================
 233  * Custom changes per device
 234  * =========================
 235  */
 236
 237 /*
 238  * Comfast CF-E520N and E320Nv2 are limited to 64 KB only,
 239  * disable some commands
 240  */
 241 #if defined(CONFIG_FOR_COMFAST_CF_E314N)    ||\
 242     defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 243     defined(CONFIG_FOR_COMFAST_CF_E520N)    ||\
 244     defined(CONFIG_FOR_COMFAST_CF_E530N)
 245         #undef CONFIG_CMD_DHCP
 246         #undef CONFIG_CMD_LOADB
 247         #undef CONFIG_CMD_SNTP
 248 #endif
 249
 250 /*
 251  * ===========================
 252  * HTTP recovery configuration
 253  * ===========================
 254  */
 255 #if defined(CONFIG_FOR_YUNCORE_AP90Q) ||\
 256     defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 257         #define WEBFAILSAFE_UPLOAD_KERNEL_ADDRESS       CFG_FLASH_BASE + 0x50000
 258 #else
 259         #define WEBFAILSAFE_UPLOAD_KERNEL_ADDRESS       CFG_LOAD_ADDR
 260 #endif
 261
 262 /* Firmware size limit */
 263 #if defined(CONFIG_FOR_COMFAST_CF_E314N)    ||\
 264     defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 265     defined(CONFIG_FOR_COMFAST_CF_E520N)    ||\
 266     defined(CONFIG_FOR_COMFAST_CF_E530N)    ||\
 267     defined(CONFIG_FOR_TPLINK_WR820N_CN)    ||\
 268     defined(CONFIG_FOR_TPLINK_WR802N)       ||\
 269     defined(CONFIG_FOR_TPLINK_WR841N_V9)
 270         #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (192 * 1024)
 271 #elif defined(CONFIG_FOR_WALLYS_DR531)  ||\
 272       defined(CONFIG_FOR_YUNCORE_AP90Q) ||\
 273       defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 274         #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (384 * 1024)
 275 #endif
 276
 277 /*
 278  * ========================
 279  * PLL/Clocks configuration
 280  * ========================
 281  */
 282 #if defined(CONFIG_FOR_TPLINK_WR820N_CN) ||\
 283     defined(CONFIG_FOR_TPLINK_WR802N)    ||\
 284     defined(CONFIG_FOR_TPLINK_WR841N_V9)
 285         #define CONFIG_QCA_PLL  QCA_PLL_PRESET_550_400_200
 286 #else
 287         #define CONFIG_QCA_PLL  QCA_PLL_PRESET_650_400_200
 288 #endif
 289
 290 #if defined(CONFIG_FOR_COMFAST_CF_E314N)    ||\
 291     defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 292     defined(CONFIG_FOR_COMFAST_CF_E520N)    ||\
 293     defined(CONFIG_FOR_COMFAST_CF_E530N)    ||\
 294     defined(CONFIG_FOR_TPLINK_WR820N_CN)    ||\
 295     defined(CONFIG_FOR_TPLINK_WR802N)       ||\
 296     defined(CONFIG_FOR_TPLINK_WR841N_V9)
 297
 298         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET    0x10000
 299         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE      0x10000
 300
 301 #elif defined(CONFIG_FOR_WALLYS_DR531)
 302
 303         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET    0x30000
 304         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE      0x10000
 305
 306 #elif defined(CONFIG_FOR_YUNCORE_AP90Q) ||\
 307       defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 308
 309         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET    0x40000
 310         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE      0x10000
 311
 312 #endif
 313
 314 /*
 315  * ==================================
 316  * For upgrade scripts in environment
 317  * ==================================
 318  */
 319 #if !defined(CONFIG_FOR_COMFAST_CF_E314N)    &&\
 320     !defined(CONFIG_FOR_COMFAST_CF_E320N_V2) &&\
 321     !defined(CONFIG_FOR_COMFAST_CF_E520N)    &&\
 322     !defined(CONFIG_FOR_COMFAST_CF_E530N)    &&\
 323     !defined(CONFIG_FOR_WALLYS_DR531)        &&\
 324     !defined(CONFIG_FOR_YUNCORE_AP90Q)       &&\
 325     !defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 326         #define CONFIG_UPG_UBOOT_SIZE_BACKUP_HEX        0x20000
 327 #endif
 328
 329 #if defined(CONFIG_FOR_YUNCORE_AP90Q) ||\
 330     defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 331         #define CONFIG_UPG_SCRIPTS_FW_ADDR_HEX  0x9F050000
 332 #endif
 333
 334 /*
 335  * ===================
 336  * Other configuration
 337  * ===================
 338  */
 339
 340 /* Cache lock for stack */
 341 #define CONFIG_INIT_SRAM_SP_OFFSET      0xbd001800
 342
 343 #endif /* _AP143_H */