u-boot/include/configs/ap143.h

   1 /*
   2  * Copyright (C) 2016 Piotr Dymacz <piotr@dymacz.pl>
   3  *
   4  * This file contains the configuration parameters
   5  * for Qualcomm Atheros QCA953x based devices
   6  *
   7  * Reference designs: AP143
   8  *
   9  * SPDX-License-Identifier: GPL-2.0
  10  */
  11
  12 #ifndef _AP143_H
  13 #define _AP143_H
  14
  15 #include <config.h>
  16 #include <configs/qca9k_common.h>
  17 #include <soc/soc_common.h>
  18
  19 /*
  20  * ==================
  21  * GPIO configuration
  22  * ==================
  23  */
  24 #if defined(CONFIG_FOR_COMFAST_CF_E314N)
  25
  26         #define CONFIG_QCA_GPIO_MASK_LED_ACT_H  GPIO4  | GPIO11 | GPIO14 |\
  27                                                 GPIO15 | GPIO16
  28         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO0 | GPIO2 | GPIO3
  29         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_H |\
  30                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_L
  31         #define CONFIG_QCA_GPIO_MASK_IN         GPIO17
  32         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
  33         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_L CONFIG_QCA_GPIO_MASK_LED_ACT_H
  34
  35 #elif defined(CONFIG_FOR_COMFAST_CF_E320N_V2)
  36
  37         #define CONFIG_QCA_GPIO_MASK_LED_ACT_H  GPIO0 | GPIO2 | GPIO3
  38         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_H
  39         #define CONFIG_QCA_GPIO_MASK_IN         GPIO11 | GPIO12 | GPIO14 |\
  40                                                 GPIO16 | GPIO17
  41         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_L CONFIG_QCA_GPIO_MASK_LED_ACT_H
  42
  43 #elif defined(CONFIG_FOR_COMFAST_CF_E520N) ||\
  44       defined(CONFIG_FOR_COMFAST_CF_E530N)
  45
  46         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO11
  47         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
  48         #define CONFIG_QCA_GPIO_MASK_IN         GPIO17
  49         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
  50
  51 #elif defined(CONFIG_FOR_P2W_CPE505N)
  52
  53         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO4  | GPIO11 | GPIO12 |\
  54                                                 GPIO14 | GPIO15
  55         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
  56         #define CONFIG_QCA_GPIO_MASK_IN         GPIO17
  57         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
  58
  59 #elif defined(CONFIG_FOR_P2W_R602N)
  60
  61         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO4  | GPIO11 | GPIO12 |\
  62                                                 GPIO14 | GPIO15 | GPIO16
  63         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
  64         #define CONFIG_QCA_GPIO_MASK_IN         GPIO17
  65         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
  66
  67 #elif defined(CONFIG_FOR_TPLINK_WA850RE_V2)
  68
  69         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO0  | GPIO1 | GPIO2  |\
  70                                                 GPIO3  | GPIO4 | GPIO12 |\
  71                                                 GPIO13 | GPIO14
  72         #define CONFIG_QCA_GPIO_MASK_OUT        GPIO15 |\
  73                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_L
  74         #define CONFIG_QCA_GPIO_MASK_IN         GPIO16 | GPIO17
  75         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H GPIO15 |\
  76                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_L
  77
  78 #elif defined(CONFIG_FOR_TPLINK_WR810N)
  79
  80         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO13
  81         #define CONFIG_QCA_GPIO_MASK_OUT        GPIO11 |\
  82                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_L
  83         #define CONFIG_QCA_GPIO_MASK_IN         GPIO0 | GPIO1 | GPIO12
  84         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H GPIO11 |\
  85                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_L
  86
  87 #elif defined(CONFIG_FOR_TPLINK_WR820N_CN) ||\
  88       defined(CONFIG_FOR_TPLINK_WR802N)
  89
  90         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO13
  91         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
  92         #define CONFIG_QCA_GPIO_MASK_IN         GPIO12
  93         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
  94
  95 #elif defined(CONFIG_FOR_TPLINK_WR841N_V10) ||\
  96       defined(CONFIG_FOR_TPLINK_WR841N_V9)
  97
  98         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO3  | GPIO4  | GPIO11 |\
  99                                                 GPIO13 | GPIO14 | GPIO15 |\
 100                                                 GPIO16
 101         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
 102         #define CONFIG_QCA_GPIO_MASK_IN         GPIO12 | GPIO17
 103         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
 104
 105 #elif defined(CONFIG_FOR_TPLINK_WR841N_V11)
 106
 107         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO1  | GPIO2  | GPIO3  |\
 108                                                 GPIO4  | GPIO11 | GPIO13 |\
 109                                                 GPIO14 | GPIO15 | GPIO16
 110         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
 111         #define CONFIG_QCA_GPIO_MASK_IN         GPIO12 | GPIO17
 112         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
 113
 114 #elif defined(CONFIG_FOR_TPLINK_WR842N_V3)
 115
 116         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO2  | GPIO3  | GPIO4  |\
 117                                                 GPIO11 | GPIO12 | GPIO13 |\
 118                                                 GPIO14 | GPIO15 | GPIO16 |\
 119                                                 GPIO17
 120         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
 121         #define CONFIG_QCA_GPIO_MASK_IN         GPIO0 | GPIO1
 122         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
 123
 124 #elif defined(CONFIG_FOR_WALLYS_DR531)
 125
 126         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO11 | GPIO12 | GPIO13 |\
 127                                                 GPIO14 | GPIO15 | GPIO16
 128         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
 129         #define CONFIG_QCA_GPIO_MASK_IN         GPIO17
 130         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
 131
 132 #elif defined(CONFIG_FOR_YUNCORE_AP90Q)
 133
 134         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO4 | GPIO12 | GPIO16
 135         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
 136         #define CONFIG_QCA_GPIO_MASK_IN         GPIO17
 137         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
 138
 139 #elif defined(CONFIG_FOR_YUNCORE_CPE830)
 140
 141         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO0 | GPIO1 | GPIO2  |\
 142                                                 GPIO3 | GPIO4 | GPIO12 |\
 143                                                 GPIO16
 144         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
 145         #define CONFIG_QCA_GPIO_MASK_IN         GPIO17
 146         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
 147
 148 #elif defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 149
 150         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO4  | GPIO11 | GPIO12 |\
 151                                                 GPIO13 | GPIO14 | GPIO15 |\
 152                                                 GPIO16
 153         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
 154         #define CONFIG_QCA_GPIO_MASK_IN         GPIO17
 155         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
 156
 157 #endif
 158
 159 /*
 160  * ================
 161  * Default bootargs
 162  * ================
 163  */
 164 #if defined(CONFIG_FOR_COMFAST_CF_E314N) ||\
 165     defined(CONFIG_FOR_COMFAST_CF_E320N_V2)
 166
 167         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:03 "\
 168                                 "rootfstype=jffs2 init=/sbin/init "\
 169                                 "mtdparts=ath-nor0:64k(u-boot),64k(art),1536k(uImage),14656k(rootfs),64k(mib0)"
 170
 171 #elif defined(CONFIG_FOR_COMFAST_CF_E520N) ||\
 172       defined(CONFIG_FOR_COMFAST_CF_E530N)
 173
 174         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:03 "\
 175                                 "rootfstype=jffs2 init=/sbin/init "\
 176                                 "mtdparts=ath-nor0:64k(u-boot),64k(art),1536k(uImage),6464k(rootfs),64k(mib0)"
 177
 178 #elif defined(CONFIG_FOR_P2W_CPE505N)    ||\
 179       defined(CONFIG_FOR_P2W_R602N)      ||\
 180       defined(CONFIG_FOR_YUNCORE_AP90Q)  ||\
 181       defined(CONFIG_FOR_YUNCORE_CPE830) ||\
 182       defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 183
 184         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 185                                 "rootfstype=squashfs init=/sbin/init "\
 186                                 "mtdparts=spi0.0:256k(u-boot),64k(u-boot-env),14528k(rootfs),1472k(kernel),64k(art),16000k(firmware)"
 187
 188 #elif defined(CONFIG_FOR_TPLINK_WR810N)
 189
 190         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 191                                 "rootfstype=squashfs init=/sbin/init "\
 192                                 "mtdparts=ath-nor0:128k(u-boot),1024k(kernel),6912k(rootfs),64k(config),64k(art)"
 193
 194 #elif defined(CONFIG_FOR_TPLINK_WR820N_CN)
 195
 196         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 197                                 "rootfstype=squashfs init=/sbin/init "\
 198                                 "mtdparts=ath-nor0:32k(u-boot1),32k(u-boot2),3008k(rootfs),896k(uImage),64k(mib0),64k(art)"
 199
 200 #elif defined(CONFIG_FOR_TPLINK_WA850RE_V2) ||\
 201       defined(CONFIG_FOR_TPLINK_WR841N_V10) ||\
 202       defined(CONFIG_FOR_TPLINK_WR841N_V11) ||\
 203       defined(CONFIG_FOR_TPLINK_WR841N_V9)  ||\
 204       defined(CONFIG_FOR_TPLINK_WR802N)
 205
 206         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 207                                 "rootfstype=squashfs init=/sbin/init "\
 208                                 "mtdparts=ath-nor0:128k(u-boot),1024k(kernel),2816k(rootfs),64k(config),64k(art)"
 209
 210 #elif defined(CONFIG_FOR_TPLINK_WR842N_V3)
 211
 212         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 213                                 "rootfstype=jffs2 init=/sbin/init "\
 214                                 "mtdparts=ath-nor0:32k(u-boot1),32k(u-boot2),3008k(rootfs),896k(uImage),64k(mib0),64k(ART)"
 215
 216 #elif defined(CONFIG_FOR_WALLYS_DR531)
 217
 218         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 219                                 "rootfstype=jffs2 init=/sbin/init "\
 220                                 "mtdparts=ath-nor0:256k(u-boot),64k(u-boot-env),6336k(rootfs),1408k(uImage),64k(mib0),64k(ART)"
 221
 222 #endif
 223
 224 /*
 225  * =============================
 226  * Load address and boot command
 227  * =============================
 228  */
 229 #if defined(CONFIG_FOR_COMFAST_CF_E314N)    ||\
 230     defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 231     defined(CONFIG_FOR_COMFAST_CF_E520N)    ||\
 232     defined(CONFIG_FOR_COMFAST_CF_E530N)    ||\
 233     defined(CONFIG_FOR_TPLINK_WA850RE_V2)   ||\
 234     defined(CONFIG_FOR_TPLINK_WR802N)       ||\
 235     defined(CONFIG_FOR_TPLINK_WR810N)       ||\
 236     defined(CONFIG_FOR_TPLINK_WR820N_CN)    ||\
 237     defined(CONFIG_FOR_TPLINK_WR841N_V10)   ||\
 238     defined(CONFIG_FOR_TPLINK_WR841N_V11)   ||\
 239     defined(CONFIG_FOR_TPLINK_WR841N_V9)    ||\
 240     defined(CONFIG_FOR_TPLINK_WR842N_V3)
 241         #define CFG_LOAD_ADDR   0x9F020000
 242 #elif defined(CONFIG_FOR_P2W_CPE505N)    ||\
 243       defined(CONFIG_FOR_P2W_R602N)      ||\
 244       defined(CONFIG_FOR_WALLYS_DR531)   ||\
 245       defined(CONFIG_FOR_YUNCORE_AP90Q)  ||\
 246       defined(CONFIG_FOR_YUNCORE_CPE830) ||\
 247       defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 248         #define CFG_LOAD_ADDR   0x9F050000
 249 #endif
 250
 251 #if defined(CONFIG_FOR_P2W_CPE505N)    ||\
 252     defined(CONFIG_FOR_P2W_R602N)      ||\
 253     defined(CONFIG_FOR_YUNCORE_AP90Q)  ||\
 254     defined(CONFIG_FOR_YUNCORE_CPE830) ||\
 255     defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 256         #define CONFIG_BOOTCOMMAND      "bootm 0x9F050000 || bootm 0x9FE80000"
 257 #else
 258         #define CONFIG_BOOTCOMMAND      "bootm " MK_STR(CFG_LOAD_ADDR)
 259 #endif
 260
 261 /*
 262  * =========================
 263  * Environment configuration
 264  * =========================
 265  */
 266 #if defined(CONFIG_FOR_COMFAST_CF_E314N)    ||\
 267     defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 268     defined(CONFIG_FOR_COMFAST_CF_E520N)    ||\
 269     defined(CONFIG_FOR_COMFAST_CF_E530N)
 270         #define CFG_ENV_ADDR            0x9F018000
 271         #define CFG_ENV_SIZE            0x7C00
 272         #define CFG_ENV_SECT_SIZE       0x10000
 273 #elif defined(CONFIG_FOR_P2W_CPE505N)    ||\
 274       defined(CONFIG_FOR_P2W_R602N)      ||\
 275       defined(CONFIG_FOR_YUNCORE_AP90Q)  ||\
 276       defined(CONFIG_FOR_YUNCORE_CPE830) ||\
 277       defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 278         #define CFG_ENV_ADDR            0x9F040000
 279         #define CFG_ENV_SIZE            0xFC00
 280         #define CFG_ENV_SECT_SIZE       0x10000
 281 #elif defined(CONFIG_FOR_TPLINK_WA850RE_V2) ||\
 282       defined(CONFIG_FOR_TPLINK_WR802N)     ||\
 283       defined(CONFIG_FOR_TPLINK_WR810N)     ||\
 284       defined(CONFIG_FOR_TPLINK_WR820N_CN)  ||\
 285       defined(CONFIG_FOR_TPLINK_WR841N_V10) ||\
 286       defined(CONFIG_FOR_TPLINK_WR841N_V11) ||\
 287       defined(CONFIG_FOR_TPLINK_WR841N_V9)  ||\
 288       defined(CONFIG_FOR_TPLINK_WR842N_V3)
 289         #define CFG_ENV_ADDR            0x9F01EC00
 290         #define CFG_ENV_SIZE            0x1000
 291         #define CFG_ENV_SECT_SIZE       0x10000
 292 #elif defined(CONFIG_FOR_WALLYS_DR531)
 293         #define CFG_ENV_ADDR            0x9F030000
 294         #define CFG_ENV_SIZE            0xF800
 295         #define CFG_ENV_SECT_SIZE       0x10000
 296 #endif
 297
 298 /*
 299  * ===========================
 300  * List of available baudrates
 301  * ===========================
 302  */
 303 #define CFG_BAUDRATE_TABLE      \
 304                 { 600,    1200,   2400,    4800,    9600,    14400, \
 305                   19200,  28800,  38400,   56000,   57600,   115200 }
 306
 307 /*
 308  * ==================================================
 309  * MAC address/es, model and WPS pin offsets in FLASH
 310  * ==================================================
 311  */
 312 #if defined(CONFIG_FOR_COMFAST_CF_E314N)    ||\
 313     defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 314     defined(CONFIG_FOR_COMFAST_CF_E520N)    ||\
 315     defined(CONFIG_FOR_COMFAST_CF_E530N)
 316         #define OFFSET_MAC_DATA_BLOCK           0x10000
 317         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x10000
 318         #define OFFSET_MAC_ADDRESS              0x00000
 319 #elif defined(CONFIG_FOR_P2W_CPE505N)    ||\
 320       defined(CONFIG_FOR_P2W_R602N)      ||\
 321       defined(CONFIG_FOR_YUNCORE_AP90Q)  ||\
 322       defined(CONFIG_FOR_YUNCORE_CPE830) ||\
 323       defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 324         #define OFFSET_MAC_DATA_BLOCK           0xFF0000
 325         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x010000
 326         #define OFFSET_MAC_ADDRESS              0x000000
 327 #elif defined(CONFIG_FOR_TPLINK_WA850RE_V2)
 328         #define OFFSET_MAC_DATA_BLOCK           0x3c0000
 329         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x010000
 330         #define OFFSET_MAC_ADDRESS              0x000008
 331 #elif defined(CONFIG_FOR_TPLINK_WR802N)     ||\
 332       defined(CONFIG_FOR_TPLINK_WR810N)     ||\
 333       defined(CONFIG_FOR_TPLINK_WR820N_CN)  ||\
 334       defined(CONFIG_FOR_TPLINK_WR841N_V10) ||\
 335       defined(CONFIG_FOR_TPLINK_WR841N_V11) ||\
 336       defined(CONFIG_FOR_TPLINK_WR841N_V9)  ||\
 337       defined(CONFIG_FOR_TPLINK_WR842N_V3)
 338         #define OFFSET_MAC_DATA_BLOCK           0x010000
 339         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x010000
 340         #define OFFSET_MAC_ADDRESS              0x00FC00
 341         #define OFFSET_ROUTER_MODEL             0x00FD00
 342         #define OFFSET_PIN_NUMBER               0x00FE00
 343 #elif defined(CONFIG_FOR_WALLYS_DR531)
 344         #define OFFSET_MAC_DATA_BLOCK           0x030000
 345         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x010000
 346         #define OFFSET_MAC_ADDRESS              0x00F810
 347 #endif
 348
 349 /*
 350  * =========================
 351  * Custom changes per device
 352  * =========================
 353  */
 354
 355 /*
 356  * Comfast CF-E520N and E320Nv2 are limited to 64 KB only,
 357  * disable some commands
 358  */
 359 #if defined(CONFIG_FOR_COMFAST_CF_E314N)    ||\
 360     defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 361     defined(CONFIG_FOR_COMFAST_CF_E520N)    ||\
 362     defined(CONFIG_FOR_COMFAST_CF_E530N)
 363         #undef CONFIG_CMD_DHCP
 364         #undef CONFIG_CMD_LOADB
 365         #undef CONFIG_CMD_SNTP
 366         #undef CONFIG_UPG_SCRIPTS_UBOOT
 367 #endif
 368
 369 /*
 370  * ===========================
 371  * HTTP recovery configuration
 372  * ===========================
 373  */
 374 #define WEBFAILSAFE_UPLOAD_KERNEL_ADDRESS       CFG_LOAD_ADDR
 375
 376 #if defined(CONFIG_FOR_COMFAST_CF_E314N)    ||\
 377     defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 378     defined(CONFIG_FOR_COMFAST_CF_E520N)    ||\
 379     defined(CONFIG_FOR_COMFAST_CF_E530N)
 380         #define WEBFAILSAFE_UPLOAD_ART_ADDRESS  (CFG_FLASH_BASE + 0x10000)
 381 #endif
 382
 383 /* Firmware size limit */
 384 #if defined(CONFIG_FOR_COMFAST_CF_E314N)    ||\
 385     defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 386     defined(CONFIG_FOR_COMFAST_CF_E520N)    ||\
 387     defined(CONFIG_FOR_COMFAST_CF_E530N)    ||\
 388     defined(CONFIG_FOR_TPLINK_WR802N)       ||\
 389     defined(CONFIG_FOR_TPLINK_WR810N)       ||\
 390     defined(CONFIG_FOR_TPLINK_WR820N_CN)    ||\
 391     defined(CONFIG_FOR_TPLINK_WR841N_V10)   ||\
 392     defined(CONFIG_FOR_TPLINK_WR841N_V11)   ||\
 393     defined(CONFIG_FOR_TPLINK_WR841N_V9)    ||\
 394     defined(CONFIG_FOR_TPLINK_WR842N_V3)
 395         #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (192 * 1024)
 396 #elif defined(CONFIG_FOR_TPLINK_WA850RE_V2)
 397         #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (448 * 1024)
 398 #elif defined(CONFIG_FOR_P2W_CPE505N)    ||\
 399       defined(CONFIG_FOR_P2W_R602N)      ||\
 400       defined(CONFIG_FOR_WALLYS_DR531)   ||\
 401       defined(CONFIG_FOR_YUNCORE_AP90Q)  ||\
 402       defined(CONFIG_FOR_YUNCORE_CPE830) ||\
 403       defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 404         #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (384 * 1024)
 405 #endif
 406
 407 /*
 408  * ========================
 409  * PLL/Clocks configuration
 410  * ========================
 411  */
 412 #if defined(CONFIG_FOR_TPLINK_WA850RE_V2) ||\
 413     defined(CONFIG_FOR_TPLINK_WR802N)     ||\
 414     defined(CONFIG_FOR_TPLINK_WR820N_CN)  ||\
 415     defined(CONFIG_FOR_TPLINK_WR841N_V9)
 416         #define CONFIG_QCA_PLL  QCA_PLL_PRESET_550_400_200
 417 #else
 418         #define CONFIG_QCA_PLL  QCA_PLL_PRESET_650_400_200
 419 #endif
 420
 421 #if defined(CONFIG_FOR_COMFAST_CF_E314N)    ||\
 422     defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 423     defined(CONFIG_FOR_COMFAST_CF_E520N)    ||\
 424     defined(CONFIG_FOR_COMFAST_CF_E530N)    ||\
 425     defined(CONFIG_FOR_TPLINK_WA850RE_V2)   ||\
 426     defined(CONFIG_FOR_TPLINK_WR802N)       ||\
 427     defined(CONFIG_FOR_TPLINK_WR810N)       ||\
 428     defined(CONFIG_FOR_TPLINK_WR820N_CN)    ||\
 429     defined(CONFIG_FOR_TPLINK_WR841N_V10)   ||\
 430     defined(CONFIG_FOR_TPLINK_WR841N_V11)   ||\
 431     defined(CONFIG_FOR_TPLINK_WR841N_V9)    ||\
 432     defined(CONFIG_FOR_TPLINK_WR842N_V3)
 433
 434         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET    0x10000
 435         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE      0x10000
 436
 437 #elif defined(CONFIG_FOR_P2W_CPE505N)    ||\
 438       defined(CONFIG_FOR_P2W_R602N)      ||\
 439       defined(CONFIG_FOR_YUNCORE_AP90Q)  ||\
 440       defined(CONFIG_FOR_YUNCORE_CPE830) ||\
 441       defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 442
 443         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET    0x40000
 444         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE      0x10000
 445
 446 #elif defined(CONFIG_FOR_WALLYS_DR531)
 447
 448         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET    0x30000
 449         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE      0x10000
 450
 451 #endif
 452
 453 /*
 454  * ==================================
 455  * For upgrade scripts in environment
 456  * ==================================
 457  */
 458 #if !defined(CONFIG_FOR_COMFAST_CF_E314N)    &&\
 459     !defined(CONFIG_FOR_COMFAST_CF_E320N_V2) &&\
 460     !defined(CONFIG_FOR_COMFAST_CF_E520N)    &&\
 461     !defined(CONFIG_FOR_COMFAST_CF_E530N)    &&\
 462     !defined(CONFIG_FOR_P2W_CPE505N)         &&\
 463     !defined(CONFIG_FOR_P2W_R602N)           &&\
 464     !defined(CONFIG_FOR_WALLYS_DR531)        &&\
 465     !defined(CONFIG_FOR_YUNCORE_AP90Q)       &&\
 466     !defined(CONFIG_FOR_YUNCORE_CPE830)      &&\
 467     !defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 468         #define CONFIG_UPG_UBOOT_SIZE_BACKUP_HEX        0x20000
 469 #endif
 470
 471 #if defined(CONFIG_FOR_P2W_CPE505N)    ||\
 472     defined(CONFIG_FOR_P2W_R602N)      ||\
 473     defined(CONFIG_FOR_YUNCORE_AP90Q)  ||\
 474     defined(CONFIG_FOR_YUNCORE_CPE830) ||\
 475     defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 476         #define CONFIG_UPG_SCRIPTS_FW_ADDR_HEX  0x9F050000
 477 #endif
 478
 479 /*
 480  * ===================
 481  * Other configuration
 482  * ===================
 483  */
 484
 485 /* Cache lock for stack */
 486 #define CONFIG_INIT_SRAM_SP_OFFSET      0xbd001800
 487
 488 #endif /* _AP143_H */