u-boot/include/configs/ap143.h

   1 /*
   2  * Copyright (C) 2016 Piotr Dymacz <piotr@dymacz.pl>
   3  *
   4  * This file contains the configuration parameters
   5  * for Qualcomm Atheros QCA953x based devices
   6  *
   7  * Reference designs: AP143
   8  *
   9  * SPDX-License-Identifier: GPL-2.0
  10  */
  11
  12 #ifndef _AP143_H
  13 #define _AP143_H
  14
  15 #include <config.h>
  16 #include <configs/qca9k_common.h>
  17 #include <soc/soc_common.h>
  18
  19 /*
  20  * ==================
  21  * GPIO configuration
  22  * ==================
  23  */
  24 #if defined(CONFIG_FOR_COMFAST_CF_E314N)
  25
  26         #define CONFIG_QCA_GPIO_MASK_LED_ACT_H  GPIO4  | GPIO11 | GPIO14 |\
  27                                                 GPIO15 | GPIO16
  28         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO0 | GPIO2 | GPIO3
  29         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_H |\
  30                                                 CONFIG_QCA_GPIO_MASK_LED_ACT_L
  31         #define CONFIG_QCA_GPIO_MASK_IN         GPIO17
  32         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
  33         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_L CONFIG_QCA_GPIO_MASK_LED_ACT_H
  34
  35 #elif defined(CONFIG_FOR_COMFAST_CF_E320N_V2)
  36
  37         #define CONFIG_QCA_GPIO_MASK_LED_ACT_H  GPIO0 | GPIO2 | GPIO3
  38         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_H
  39         #define CONFIG_QCA_GPIO_MASK_IN         GPIO11 | GPIO12 | GPIO14 |\
  40                                                 GPIO16 | GPIO17
  41         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_L CONFIG_QCA_GPIO_MASK_LED_ACT_H
  42
  43 #elif defined(CONFIG_FOR_COMFAST_CF_E520N) ||\
  44       defined(CONFIG_FOR_COMFAST_CF_E530N)
  45
  46         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO11
  47         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
  48         #define CONFIG_QCA_GPIO_MASK_IN         GPIO17
  49         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
  50
  51 #elif defined(CONFIG_FOR_TPLINK_WR820N_CN) ||\
  52       defined(CONFIG_FOR_TPLINK_WR802N)
  53
  54         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO13
  55         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
  56         #define CONFIG_QCA_GPIO_MASK_IN         GPIO12
  57         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
  58
  59 #elif defined(CONFIG_FOR_TPLINK_WR841N_V10) ||\
  60       defined(CONFIG_FOR_TPLINK_WR841N_V9)
  61
  62         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO3  | GPIO4  | GPIO11 |\
  63                                                 GPIO13 | GPIO14 | GPIO15 |\
  64                                                 GPIO16
  65         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
  66         #define CONFIG_QCA_GPIO_MASK_IN         GPIO12 | GPIO17
  67         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
  68
  69 #elif defined(CONFIG_FOR_TPLINK_WR841N_V11)
  70
  71         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO1  | GPIO2  | GPIO3  |\
  72                                                 GPIO4  | GPIO11 | GPIO13 |\
  73                                                 GPIO14 | GPIO15 | GPIO16
  74         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
  75         #define CONFIG_QCA_GPIO_MASK_IN         GPIO12 | GPIO17
  76         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
  77
  78 #elif defined(CONFIG_FOR_WALLYS_DR531)
  79
  80         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO11 | GPIO12 | GPIO13 |\
  81                                                 GPIO14 | GPIO15 | GPIO16
  82         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
  83         #define CONFIG_QCA_GPIO_MASK_IN         GPIO17
  84         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
  85
  86 #elif defined(CONFIG_FOR_YUNCORE_AP90Q)
  87
  88         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO4 | GPIO12 | GPIO16
  89         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
  90         #define CONFIG_QCA_GPIO_MASK_IN         GPIO17
  91         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
  92
  93 #elif defined(CONFIG_FOR_YUNCORE_CPE830)
  94
  95         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO0 | GPIO1 | GPIO2  |\
  96                                                 GPIO3 | GPIO4 | GPIO12 |\
  97                                                 GPIO16
  98         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
  99         #define CONFIG_QCA_GPIO_MASK_IN         GPIO17
 100         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
 101
 102 #elif defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 103
 104         #define CONFIG_QCA_GPIO_MASK_LED_ACT_L  GPIO4  | GPIO11 | GPIO12 |\
 105                                                 GPIO13 | GPIO14 | GPIO15 |\
 106                                                 GPIO16
 107         #define CONFIG_QCA_GPIO_MASK_OUT        CONFIG_QCA_GPIO_MASK_LED_ACT_L
 108         #define CONFIG_QCA_GPIO_MASK_IN         GPIO17
 109         #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
 110
 111 #endif
 112
 113 /*
 114  * ================
 115  * Default bootargs
 116  * ================
 117  */
 118 #if defined(CONFIG_FOR_COMFAST_CF_E314N) ||\
 119     defined(CONFIG_FOR_COMFAST_CF_E320N_V2)
 120
 121         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:03 "\
 122                                 "rootfstype=jffs2 init=/sbin/init "\
 123                                 "mtdparts=ath-nor0:64k(u-boot),64k(art),1536k(uImage),14656k(rootfs),64k(mib0)"
 124
 125 #elif defined(CONFIG_FOR_COMFAST_CF_E520N) ||\
 126       defined(CONFIG_FOR_COMFAST_CF_E530N)
 127
 128         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:03 "\
 129                                 "rootfstype=jffs2 init=/sbin/init "\
 130                                 "mtdparts=ath-nor0:64k(u-boot),64k(art),1536k(uImage),6464k(rootfs),64k(mib0)"
 131
 132 #elif defined(CONFIG_FOR_TPLINK_WR820N_CN)
 133
 134         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 135                                 "rootfstype=squashfs init=/sbin/init "\
 136                                 "mtdparts=ath-nor0:32k(u-boot1),32k(u-boot2),3008k(rootfs),896k(uImage),64k(mib0),64k(art)"
 137
 138 #elif defined(CONFIG_FOR_TPLINK_WR841N_V10) ||\
 139       defined(CONFIG_FOR_TPLINK_WR841N_V11) ||\
 140       defined(CONFIG_FOR_TPLINK_WR841N_V9)  ||\
 141       defined(CONFIG_FOR_TPLINK_WR802N)
 142
 143         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 144                                 "rootfstype=squashfs init=/sbin/init "\
 145                                 "mtdparts=ath-nor0:128k(u-boot),1024k(kernel),2816k(rootfs),64k(config),64k(art)"
 146
 147 #elif defined(CONFIG_FOR_WALLYS_DR531)
 148
 149         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 150                                 "rootfstype=jffs2 init=/sbin/init "\
 151                                 "mtdparts=ath-nor0:256k(u-boot),64k(u-boot-env),6336k(rootfs),1408k"
 152
 153 #elif defined(CONFIG_FOR_YUNCORE_AP90Q)  ||\
 154       defined(CONFIG_FOR_YUNCORE_CPE830) ||\
 155       defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 156
 157         #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
 158                                 "rootfstype=squashfs init=/sbin/init "\
 159                                 "mtdparts=spi0.0:256k(u-boot),64k(u-boot-env),14528k(rootfs),1472k(kernel),64k(art),16000k(firmware)"
 160
 161 #endif
 162
 163 /*
 164  * =============================
 165  * Load address and boot command
 166  * =============================
 167  */
 168 #if defined(CONFIG_FOR_COMFAST_CF_E314N)    ||\
 169     defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 170     defined(CONFIG_FOR_COMFAST_CF_E520N)    ||\
 171     defined(CONFIG_FOR_COMFAST_CF_E530N)    ||\
 172     defined(CONFIG_FOR_TPLINK_WR802N)       ||\
 173     defined(CONFIG_FOR_TPLINK_WR820N_CN)    ||\
 174     defined(CONFIG_FOR_TPLINK_WR841N_V10)   ||\
 175     defined(CONFIG_FOR_TPLINK_WR841N_V11)   ||\
 176     defined(CONFIG_FOR_TPLINK_WR841N_V9)
 177         #define CFG_LOAD_ADDR   0x9F020000
 178 #elif defined(CONFIG_FOR_WALLYS_DR531)   ||\
 179       defined(CONFIG_FOR_YUNCORE_AP90Q)  ||\
 180       defined(CONFIG_FOR_YUNCORE_CPE830) ||\
 181       defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 182         #define CFG_LOAD_ADDR   0x9F050000
 183 #endif
 184
 185 #if defined(CONFIG_FOR_YUNCORE_AP90Q)  ||\
 186     defined(CONFIG_FOR_YUNCORE_CPE830) ||\
 187     defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 188         #define CONFIG_BOOTCOMMAND      "bootm 0x9FE80000 || bootm 0x9F050000"
 189 #else
 190         #define CONFIG_BOOTCOMMAND      "bootm " MK_STR(CFG_LOAD_ADDR)
 191 #endif
 192
 193 /*
 194  * =========================
 195  * Environment configuration
 196  * =========================
 197  */
 198 #if defined(CONFIG_FOR_COMFAST_CF_E314N)    ||\
 199     defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 200     defined(CONFIG_FOR_COMFAST_CF_E520N)    ||\
 201     defined(CONFIG_FOR_COMFAST_CF_E530N)
 202         #define CFG_ENV_ADDR            0x9F018000
 203         #define CFG_ENV_SIZE            0x7C00
 204         #define CFG_ENV_SECT_SIZE       0x10000
 205 #elif defined(CONFIG_FOR_TPLINK_WR802N)     ||\
 206       defined(CONFIG_FOR_TPLINK_WR820N_CN)  ||\
 207       defined(CONFIG_FOR_TPLINK_WR841N_V10) ||\
 208       defined(CONFIG_FOR_TPLINK_WR841N_V11) ||\
 209       defined(CONFIG_FOR_TPLINK_WR841N_V9)
 210         #define CFG_ENV_ADDR            0x9F01EC00
 211         #define CFG_ENV_SIZE            0x1000
 212         #define CFG_ENV_SECT_SIZE       0x10000
 213 #elif defined(CONFIG_FOR_WALLYS_DR531)
 214         #define CFG_ENV_ADDR            0x9F030000
 215         #define CFG_ENV_SIZE            0xF800
 216         #define CFG_ENV_SECT_SIZE       0x10000
 217 #elif defined(CONFIG_FOR_YUNCORE_AP90Q)  ||\
 218       defined(CONFIG_FOR_YUNCORE_CPE830) ||\
 219       defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 220         #define CFG_ENV_ADDR            0x9F040000
 221         #define CFG_ENV_SIZE            0xFC00
 222         #define CFG_ENV_SECT_SIZE       0x10000
 223 #endif
 224
 225 /*
 226  * ===========================
 227  * List of available baudrates
 228  * ===========================
 229  */
 230 #define CFG_BAUDRATE_TABLE      \
 231                 { 600,    1200,   2400,    4800,    9600,    14400, \
 232                   19200,  28800,  38400,   56000,   57600,   115200 }
 233
 234 /*
 235  * ==================================================
 236  * MAC address/es, model and WPS pin offsets in FLASH
 237  * ==================================================
 238  */
 239 #if defined(CONFIG_FOR_COMFAST_CF_E314N)    ||\
 240     defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 241     defined(CONFIG_FOR_COMFAST_CF_E520N)    ||\
 242     defined(CONFIG_FOR_COMFAST_CF_E530N)
 243         #define OFFSET_MAC_DATA_BLOCK           0x10000
 244         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x10000
 245         #define OFFSET_MAC_ADDRESS              0x00000
 246 #elif defined(CONFIG_FOR_TPLINK_WR802N)     ||\
 247       defined(CONFIG_FOR_TPLINK_WR820N_CN)  ||\
 248       defined(CONFIG_FOR_TPLINK_WR841N_V10) ||\
 249       defined(CONFIG_FOR_TPLINK_WR841N_V11) ||\
 250       defined(CONFIG_FOR_TPLINK_WR841N_V9)
 251         #define OFFSET_MAC_DATA_BLOCK           0x010000
 252         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x010000
 253         #define OFFSET_MAC_ADDRESS              0x00FC00
 254         #define OFFSET_ROUTER_MODEL             0x00FD00
 255         #define OFFSET_PIN_NUMBER               0x00FE00
 256 #elif defined(CONFIG_FOR_WALLYS_DR531)
 257         #define OFFSET_MAC_DATA_BLOCK           0x030000
 258         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x010000
 259         #define OFFSET_MAC_ADDRESS              0x00F810
 260 #elif defined(CONFIG_FOR_YUNCORE_AP90Q)  ||\
 261       defined(CONFIG_FOR_YUNCORE_CPE830) ||\
 262       defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 263         #define OFFSET_MAC_DATA_BLOCK           0xFF0000
 264         #define OFFSET_MAC_DATA_BLOCK_LENGTH    0x010000
 265         #define OFFSET_MAC_ADDRESS              0x000000
 266 #endif
 267
 268 /*
 269  * =========================
 270  * Custom changes per device
 271  * =========================
 272  */
 273
 274 /*
 275  * Comfast CF-E520N and E320Nv2 are limited to 64 KB only,
 276  * disable some commands
 277  */
 278 #if defined(CONFIG_FOR_COMFAST_CF_E314N)    ||\
 279     defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 280     defined(CONFIG_FOR_COMFAST_CF_E520N)    ||\
 281     defined(CONFIG_FOR_COMFAST_CF_E530N)
 282         #undef CONFIG_CMD_DHCP
 283         #undef CONFIG_CMD_LOADB
 284         #undef CONFIG_CMD_SNTP
 285 #endif
 286
 287 /*
 288  * ===========================
 289  * HTTP recovery configuration
 290  * ===========================
 291  */
 292 #define WEBFAILSAFE_UPLOAD_KERNEL_ADDRESS       CFG_LOAD_ADDR
 293
 294 #if defined(CONFIG_FOR_COMFAST_CF_E314N)    ||\
 295     defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 296     defined(CONFIG_FOR_COMFAST_CF_E520N)    ||\
 297     defined(CONFIG_FOR_COMFAST_CF_E530N)
 298         #define WEBFAILSAFE_UPLOAD_ART_ADDRESS  (CFG_FLASH_BASE + 0x10000)
 299 #endif
 300
 301 /* Firmware size limit */
 302 #if defined(CONFIG_FOR_COMFAST_CF_E314N)    ||\
 303     defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 304     defined(CONFIG_FOR_COMFAST_CF_E520N)    ||\
 305     defined(CONFIG_FOR_COMFAST_CF_E530N)    ||\
 306     defined(CONFIG_FOR_TPLINK_WR802N)       ||\
 307     defined(CONFIG_FOR_TPLINK_WR820N_CN)    ||\
 308     defined(CONFIG_FOR_TPLINK_WR841N_V10)   ||\
 309     defined(CONFIG_FOR_TPLINK_WR841N_V11)   ||\
 310     defined(CONFIG_FOR_TPLINK_WR841N_V9)
 311         #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (192 * 1024)
 312 #elif defined(CONFIG_FOR_WALLYS_DR531)   ||\
 313       defined(CONFIG_FOR_YUNCORE_AP90Q)  ||\
 314       defined(CONFIG_FOR_YUNCORE_CPE830) ||\
 315       defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 316         #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES        (384 * 1024)
 317 #endif
 318
 319 /*
 320  * ========================
 321  * PLL/Clocks configuration
 322  * ========================
 323  */
 324 #if defined(CONFIG_FOR_TPLINK_WR802N)    ||\
 325     defined(CONFIG_FOR_TPLINK_WR820N_CN) ||\
 326     defined(CONFIG_FOR_TPLINK_WR841N_V9)
 327         #define CONFIG_QCA_PLL  QCA_PLL_PRESET_550_400_200
 328 #else
 329         #define CONFIG_QCA_PLL  QCA_PLL_PRESET_650_400_200
 330 #endif
 331
 332 #if defined(CONFIG_FOR_COMFAST_CF_E314N)    ||\
 333     defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
 334     defined(CONFIG_FOR_COMFAST_CF_E520N)    ||\
 335     defined(CONFIG_FOR_COMFAST_CF_E530N)    ||\
 336     defined(CONFIG_FOR_TPLINK_WR802N)       ||\
 337     defined(CONFIG_FOR_TPLINK_WR820N_CN)    ||\
 338     defined(CONFIG_FOR_TPLINK_WR841N_V10)   ||\
 339     defined(CONFIG_FOR_TPLINK_WR841N_V11)   ||\
 340     defined(CONFIG_FOR_TPLINK_WR841N_V9)
 341
 342         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET    0x10000
 343         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE      0x10000
 344
 345 #elif defined(CONFIG_FOR_WALLYS_DR531)
 346
 347         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET    0x30000
 348         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE      0x10000
 349
 350 #elif defined(CONFIG_FOR_YUNCORE_AP90Q)  ||\
 351       defined(CONFIG_FOR_YUNCORE_CPE830) ||\
 352       defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 353
 354         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET    0x40000
 355         #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE      0x10000
 356
 357 #endif
 358
 359 /*
 360  * ==================================
 361  * For upgrade scripts in environment
 362  * ==================================
 363  */
 364 #if !defined(CONFIG_FOR_COMFAST_CF_E314N)    &&\
 365     !defined(CONFIG_FOR_COMFAST_CF_E320N_V2) &&\
 366     !defined(CONFIG_FOR_COMFAST_CF_E520N)    &&\
 367     !defined(CONFIG_FOR_COMFAST_CF_E530N)    &&\
 368     !defined(CONFIG_FOR_WALLYS_DR531)        &&\
 369     !defined(CONFIG_FOR_YUNCORE_AP90Q)       &&\
 370     !defined(CONFIG_FOR_YUNCORE_CPE830)      &&\
 371     !defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 372         #define CONFIG_UPG_UBOOT_SIZE_BACKUP_HEX        0x20000
 373 #endif
 374
 375 #if defined(CONFIG_FOR_YUNCORE_AP90Q)  ||\
 376     defined(CONFIG_FOR_YUNCORE_CPE830) ||\
 377     defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
 378         #define CONFIG_UPG_SCRIPTS_FW_ADDR_HEX  0x9F050000
 379 #endif
 380
 381 /*
 382  * ===================
 383  * Other configuration
 384  * ===================
 385  */
 386
 387 /* Cache lock for stack */
 388 #define CONFIG_INIT_SRAM_SP_OFFSET      0xbd001800
 389
 390 #endif /* _AP143_H */