2 * Copyright (C) 2016 Piotr Dymacz <piotr@dymacz.pl>
4 * This file contains the configuration parameters
5 * for Qualcomm Atheros QCA953x based devices
7 * Reference designs: AP143
9 * SPDX-License-Identifier: GPL-2.0
16 #include <configs/qca9k_common.h>
17 #include <soc/soc_common.h>
24 #if defined(CONFIG_FOR_COMFAST_CF_E314N)
26 #define CONFIG_QCA_GPIO_MASK_LED_ACT_H GPIO4 | GPIO11 | GPIO14 |\
28 #define CONFIG_QCA_GPIO_MASK_LED_ACT_L GPIO0 | GPIO2 | GPIO3
29 #define CONFIG_QCA_GPIO_MASK_OUT CONFIG_QCA_GPIO_MASK_LED_ACT_H |\
30 CONFIG_QCA_GPIO_MASK_LED_ACT_L
31 #define CONFIG_QCA_GPIO_MASK_IN GPIO17
32 #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
33 #define CONFIG_QCA_GPIO_MASK_OUT_INIT_L CONFIG_QCA_GPIO_MASK_LED_ACT_H
35 #elif defined(CONFIG_FOR_COMFAST_CF_E320N_V2)
37 #define CONFIG_QCA_GPIO_MASK_LED_ACT_H GPIO0 | GPIO2 | GPIO3
38 #define CONFIG_QCA_GPIO_MASK_OUT CONFIG_QCA_GPIO_MASK_LED_ACT_H
39 #define CONFIG_QCA_GPIO_MASK_IN GPIO17
40 #define CONFIG_QCA_GPIO_MASK_OUT_INIT_L CONFIG_QCA_GPIO_MASK_LED_ACT_H
42 #elif defined(CONFIG_FOR_COMFAST_CF_E520N_CF_E530N)
44 #define CONFIG_QCA_GPIO_MASK_LED_ACT_L GPIO11
45 #define CONFIG_QCA_GPIO_MASK_OUT CONFIG_QCA_GPIO_MASK_LED_ACT_L
46 #define CONFIG_QCA_GPIO_MASK_IN GPIO17
47 #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
49 #elif defined(CONFIG_FOR_TPLINK_WR820N_CN) ||\
50 defined(CONFIG_FOR_TPLINK_WR802N)
52 #define CONFIG_QCA_GPIO_MASK_LED_ACT_L GPIO13
53 #define CONFIG_QCA_GPIO_MASK_OUT CONFIG_QCA_GPIO_MASK_LED_ACT_L
54 #define CONFIG_QCA_GPIO_MASK_IN GPIO12
55 #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
57 #elif defined(CONFIG_FOR_TPLINK_WR841N_V9)
59 #define CONFIG_QCA_GPIO_MASK_LED_ACT_L GPIO3 | GPIO4 | GPIO11 |\
60 GPIO13 | GPIO14 | GPIO15 |\
62 #define CONFIG_QCA_GPIO_MASK_OUT CONFIG_QCA_GPIO_MASK_LED_ACT_L
63 #define CONFIG_QCA_GPIO_MASK_IN GPIO12 | GPIO17
64 #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
66 #elif defined(CONFIG_FOR_WALLYS_DR531)
68 #define CONFIG_QCA_GPIO_MASK_LED_ACT_L GPIO11 | GPIO12 | GPIO13 |\
69 GPIO14 | GPIO15 | GPIO16
70 #define CONFIG_QCA_GPIO_MASK_OUT CONFIG_QCA_GPIO_MASK_LED_ACT_L
71 #define CONFIG_QCA_GPIO_MASK_IN GPIO17
72 #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
74 #elif defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
76 #define CONFIG_QCA_GPIO_MASK_LED_ACT_L GPIO4 | GPIO11 | GPIO12 |\
77 GPIO13 | GPIO14 | GPIO15 |\
79 #define CONFIG_QCA_GPIO_MASK_OUT CONFIG_QCA_GPIO_MASK_LED_ACT_L
80 #define CONFIG_QCA_GPIO_MASK_IN GPIO17
81 #define CONFIG_QCA_GPIO_MASK_OUT_INIT_H CONFIG_QCA_GPIO_MASK_LED_ACT_L
90 #if defined(CONFIG_FOR_COMFAST_CF_E314N) ||\
91 defined(CONFIG_FOR_COMFAST_CF_E320N_V2)
93 #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:03 "\
94 "rootfstype=jffs2 init=/sbin/init "\
95 "mtdparts=ath-nor0:64k(u-boot),64k(art),1536k(uImage),14656k(rootfs),64k(mib0)"
97 #elif defined(CONFIG_FOR_COMFAST_CF_E520N_CF_E530N)
99 #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:03 "\
100 "rootfstype=jffs2 init=/sbin/init "\
101 "mtdparts=ath-nor0:64k(u-boot),64k(art),1536k(uImage),6464k(rootfs),64k(mib0)"
103 #elif defined(CONFIG_FOR_TPLINK_WR820N_CN)
105 #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
106 "rootfstype=squashfs init=/sbin/init "\
107 "mtdparts=ath-nor0:32k(u-boot1),32k(u-boot2),3008k(rootfs),896k(uImage),64k(mib0),64k(art)"
109 #elif defined(CONFIG_FOR_TPLINK_WR841N_V9) ||\
110 defined(CONFIG_FOR_TPLINK_WR802N)
112 #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
113 "rootfstype=squashfs init=/sbin/init "\
114 "mtdparts=ath-nor0:128k(u-boot),1024k(kernel),2816k(rootfs),64k(config),64k(art)"
116 #elif defined(CONFIG_FOR_WALLYS_DR531)
118 #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
119 "rootfstype=jffs2 init=/sbin/init "\
120 "mtdparts=ath-nor0:256k(u-boot),64k(u-boot-env),6336k(rootfs),1408k"
122 #elif defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
124 #define CONFIG_BOOTARGS "console=ttyS0,115200 root=31:02 "\
125 "rootfstype=squashfs init=/sbin/init "\
126 "mtdparts=spi0.0:256k(u-boot),64k(u-boot-env),14528k(rootfs),1472k(kernel),64k(art),16000k(firmware)"
131 * =============================
132 * Load address and boot command
133 * =============================
135 #if defined(CONFIG_FOR_COMFAST_CF_E314N) ||\
136 defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
137 defined(CONFIG_FOR_COMFAST_CF_E520N_CF_E530N) ||\
138 defined(CONFIG_FOR_TPLINK_WR820N_CN) ||\
139 defined(CONFIG_FOR_TPLINK_WR802N) ||\
140 defined(CONFIG_FOR_TPLINK_WR841N_V9)
141 #define CFG_LOAD_ADDR 0x9F020000
142 #elif defined(CONFIG_FOR_WALLYS_DR531)
143 #define CFG_LOAD_ADDR 0x9F050000
144 #elif defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
145 #define CFG_LOAD_ADDR 0x9FE80000
148 #define CONFIG_BOOTCOMMAND "bootm " MK_STR(CFG_LOAD_ADDR)
151 * =========================
152 * Environment configuration
153 * =========================
155 #if defined(CONFIG_FOR_COMFAST_CF_E314N) ||\
156 defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
157 defined(CONFIG_FOR_COMFAST_CF_E520N_CF_E530N)
158 #define CFG_ENV_ADDR 0x9F018000
159 #define CFG_ENV_SIZE 0x7C00
160 #define CFG_ENV_SECT_SIZE 0x10000
161 #elif defined(CONFIG_FOR_TPLINK_WR820N_CN) ||\
162 defined(CONFIG_FOR_TPLINK_WR802N) ||\
163 defined(CONFIG_FOR_TPLINK_WR841N_V9)
164 #define CFG_ENV_ADDR 0x9F01EC00
165 #define CFG_ENV_SIZE 0x1000
166 #define CFG_ENV_SECT_SIZE 0x10000
167 #elif defined(CONFIG_FOR_WALLYS_DR531)
168 #define CFG_ENV_ADDR 0x9F030000
169 #define CFG_ENV_SIZE 0xF800
170 #define CFG_ENV_SECT_SIZE 0x10000
171 #elif defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
172 #define CFG_ENV_ADDR 0x9F040000
173 #define CFG_ENV_SIZE 0xFC00
174 #define CFG_ENV_SECT_SIZE 0x10000
178 * ===========================
179 * List of available baudrates
180 * ===========================
182 #define CFG_BAUDRATE_TABLE \
183 { 600, 1200, 2400, 4800, 9600, 14400, \
184 19200, 28800, 38400, 56000, 57600, 115200 }
187 * ==================================================
188 * MAC address/es, model and WPS pin offsets in FLASH
189 * ==================================================
191 #if defined(CONFIG_FOR_COMFAST_CF_E314N) ||\
192 defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
193 defined(CONFIG_FOR_COMFAST_CF_E520N_CF_E530N)
194 #define OFFSET_MAC_DATA_BLOCK 0x10000
195 #define OFFSET_MAC_DATA_BLOCK_LENGTH 0x10000
196 #define OFFSET_MAC_ADDRESS 0x00000
197 #elif defined(CONFIG_FOR_TPLINK_WR820N_CN) ||\
198 defined(CONFIG_FOR_TPLINK_WR802N) ||\
199 defined(CONFIG_FOR_TPLINK_WR841N_V9)
200 #define OFFSET_MAC_DATA_BLOCK 0x010000
201 #define OFFSET_MAC_DATA_BLOCK_LENGTH 0x010000
202 #define OFFSET_MAC_ADDRESS 0x00FC00
203 #define OFFSET_ROUTER_MODEL 0x00FD00
204 #define OFFSET_PIN_NUMBER 0x00FE00
205 #elif defined(CONFIG_FOR_WALLYS_DR531)
206 #define OFFSET_MAC_DATA_BLOCK 0x030000
207 #define OFFSET_MAC_DATA_BLOCK_LENGTH 0x010000
208 #define OFFSET_MAC_ADDRESS 0x00F810
209 #elif defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
210 #define OFFSET_MAC_DATA_BLOCK 0xFF0000
211 #define OFFSET_MAC_DATA_BLOCK_LENGTH 0x010000
212 #define OFFSET_MAC_ADDRESS 0x000000
216 * =========================
217 * Custom changes per device
218 * =========================
222 * Comfast CF-E520N and E320Nv2 are limited to 64 KB only,
223 * disable some commands
225 #if defined(CONFIG_FOR_COMFAST_CF_E314N) ||\
226 defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
227 defined(CONFIG_FOR_COMFAST_CF_E520N_CF_E530N)
228 #undef CONFIG_CMD_DHCP
229 #undef CONFIG_CMD_LOADB
230 #undef CONFIG_CMD_SNTP
234 * ===========================
235 * HTTP recovery configuration
236 * ===========================
238 #if defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
239 #define WEBFAILSAFE_UPLOAD_KERNEL_ADDRESS CFG_FLASH_BASE + 0x50000
241 #define WEBFAILSAFE_UPLOAD_KERNEL_ADDRESS CFG_LOAD_ADDR
244 /* Firmware size limit */
245 #if defined(CONFIG_FOR_COMFAST_CF_E314N) ||\
246 defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
247 defined(CONFIG_FOR_COMFAST_CF_E520N_CF_E530N) ||\
248 defined(CONFIG_FOR_TPLINK_WR820N_CN) ||\
249 defined(CONFIG_FOR_TPLINK_WR802N) ||\
250 defined(CONFIG_FOR_TPLINK_WR841N_V9)
251 #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES (192 * 1024)
252 #elif defined(CONFIG_FOR_WALLYS_DR531) ||\
253 defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
254 #define WEBFAILSAFE_UPLOAD_LIMITED_AREA_IN_BYTES (384 * 1024)
258 * ========================
259 * PLL/Clocks configuration
260 * ========================
262 #if defined(CONFIG_FOR_TPLINK_WR820N_CN) ||\
263 defined(CONFIG_FOR_TPLINK_WR802N) ||\
264 defined(CONFIG_FOR_TPLINK_WR841N_V9)
265 #define CONFIG_QCA_PLL QCA_PLL_PRESET_550_400_200
266 #elif defined(CONFIG_FOR_COMFAST_CF_E314N) ||\
267 defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
268 defined(CONFIG_FOR_COMFAST_CF_E520N_CF_E530N) ||\
269 defined(CONFIG_FOR_WALLYS_DR531) ||\
270 defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
271 #define CONFIG_QCA_PLL QCA_PLL_PRESET_650_400_200
274 #if defined(CONFIG_FOR_COMFAST_CF_E314N) ||\
275 defined(CONFIG_FOR_COMFAST_CF_E320N_V2) ||\
276 defined(CONFIG_FOR_COMFAST_CF_E520N_CF_E530N) ||\
277 defined(CONFIG_FOR_TPLINK_WR820N_CN) ||\
278 defined(CONFIG_FOR_TPLINK_WR802N) ||\
279 defined(CONFIG_FOR_TPLINK_WR841N_V9)
281 #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET 0x10000
282 #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE 0x10000
284 #elif defined(CONFIG_FOR_WALLYS_DR531)
286 #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET 0x30000
287 #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE 0x10000
289 #elif defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
291 #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_OFFSET 0x40000
292 #define CONFIG_QCA_PLL_IN_FLASH_BLOCK_SIZE 0x10000
297 * ==================================
298 * For upgrade scripts in environment
299 * ==================================
301 #if !defined(CONFIG_FOR_COMFAST_CF_E314N) &&\
302 !defined(CONFIG_FOR_COMFAST_CF_E320N_V2) &&\
303 !defined(CONFIG_FOR_COMFAST_CF_E520N_CF_E530N) &&\
304 !defined(CONFIG_FOR_WALLYS_DR531) &&\
305 !defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
306 #define CONFIG_UPG_UBOOT_SIZE_BACKUP_HEX 0x20000
309 #if defined(CONFIG_FOR_ZBTLINK_ZBT_WE1526)
310 #define CONFIG_UPG_SCRIPTS_FW_ADDR_HEX 0x9F050000
314 * ===================
315 * Other configuration
316 * ===================
319 /* Cache lock for stack */
320 #define CONFIG_INIT_SRAM_SP_OFFSET 0xbd001800
322 #endif /* _AP143_H */